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4 messages
4 total messages Started by Court Demas Tue, 04 Aug 1992 20:35
Vertical Retrace Interrupt (?)
#412
Author: Court Demas
Date: Tue, 04 Aug 1992 20:35
32 lines
1641 bytes
I've heard many conflicting things about using the Vertical Retrace Interrupt -
like that it can't be used with any IBM VGA's (some say just IBM's ISA VGA
card - does such a thing exist?).

I checked Sutty and Blair, and it has the following on pg 85/86:

Vertical Retrace End (Index 11h)
.
.
Besides determining the end of the vertical retrace, this register also
controls other functions that can be useful for some applications.
Bit Definitions:
..
D5 - Enable Vertical Interrupt (0=enable)
..
o D5: A zero in Enable Vertical Interrupt will cause an interrupt to be
generated to the processor on interrupt line IRQ2 with every vertical retrace.
This can be used as an accurate 60hz interrupt (for animation, for instance).
Once a vertical interrupt is generated, the interrupt is latched on until it is
acknowledged.  Writing a zero to D4 (Clear Vertical Interrupt) will
acknowledge the interrupt.
..
It seems like this is available on EGA also.  I just don't understand how you
can write an interrupt driver when all you know is the IRQ number.  Before
I break out PC-Watch and try to locate this sucker, it would be cool if
somebody else could explain.

thanks..


-court
Re: Vertical Retrace Interrupt (?)
#414
Author: Peter SPHINX Cellik
Date: Wed, 05 Aug 1992 08:51
51 lines
2567 bytes
In article <QeTic5_00WB20fG3UV@andrew.cmu.edu>, cd2a+@andrew.cmu.edu (Court Demas) writes:
|> 
|> I've heard many conflicting things about using the Vertical Retrace Interrupt -
|> like that it can't be used with any IBM VGA's (some say just IBM's ISA VGA
|> card - does such a thing exist?).
|> 
|> I checked Sutty and Blair, and it has the following on pg 85/86:
|> 
|> Vertical Retrace End (Index 11h)
|> .
|> .
|> Besides determining the end of the vertical retrace, this register also
|> controls other functions that can be useful for some applications.
|> Bit Definitions:
|> ..
|> D5 - Enable Vertical Interrupt (0=enable)
|> ..
|> o D5: A zero in Enable Vertical Interrupt will cause an interrupt to be
|> generated to the processor on interrupt line IRQ2 with every vertical retrace.
|> This can be used as an accurate 60hz interrupt (for animation, for instance).
|> Once a vertical interrupt is generated, the interrupt is latched on until it is
|> acknowledged.  Writing a zero to D4 (Clear Vertical Interrupt) will
|> acknowledge the interrupt.
|> ..
|> It seems like this is available on EGA also.  I just don't understand how you
|> can write an interrupt driver when all you know is the IRQ number.  Before
|> I break out PC-Watch and try to locate this sucker, it would be cool if
|> somebody else could explain.
|> 
|> thanks..
|> 
|> 
|> -court

I think the IRQ2 generates interrupt 0xA or 0xC.  I have the info at home,
I will look it up tonight.  For the above info you gave, index 11h is on 
what controller?  Is it the misc or the graphics control?  Better yet what
is the port number?  0x3CE?  Just a guess.  I want to give this a try, again.
But I don't have the book that I tried it with last time.  If you give me
these numbers, I should be able to figure it out (I hope :-)).

Has anyone had any success yet?

        SPHINX


====================================================
=== Kill others only if you wish to be killed.   ===
===                                       SPHINX ===   
====================================================
Re: Vertical Retrace Interrupt (?)
#507
Author: Khan
Date: Wed, 05 Aug 1992 13:51
15 lines
1058 bytes
In article <1992Aug5.095156@axion.bt.co.uk> pcellik@axion.bt.co.uk (Peter SPHINX Cellik) writes:
>
>|> It seems like this is available on EGA also.  I just don't understand how you
>|> can write an interrupt driver when all you know is the IRQ number.
>
>I think the IRQ2 generates interrupt 0xA or 0xC.

It's simple: IRQ n needs a handler on INT n + 8.

Thus, IRQ2 requires a handler for INT 0x0A.

This is the standard mapping - my understandingf is that this can be
changed if one wishes to reprogram the interrupt controller chip (don't
ask me how).
Re: Vertical Retrace Interrupt (?)
#426
Author: Scott Mayo
Date: Wed, 05 Aug 1992 16:47
35 lines
2171 bytes
cd2a+@andrew.cmu.edu (Court Demas) writes:


>I've heard many conflicting things about using the Vertical Retrace Interrupt -
>like that it can't be used with any IBM VGA's (some say just IBM's ISA VGA
>card - does such a thing exist?).

>It seems like this is available on EGA also.  I just don't understand how you
>can write an interrupt driver when all you know is the IRQ number.  Before
>I break out PC-Watch and try to locate this sucker, it would be cool if
>somebody else could explain.

Prentice Hall puts out a book called (I think) "Programming EGA/VGA displays"
or something similiar. Don't buy it; it is full of astounding typographical
errors, at least the copy I saw was. But it talks at length about snagging
the vertical and horisontal interrupts. There are apparently a *lot*
of pitfalls, not the least of which is that some (EGA?) cards were built
with the retrace-in-progress bit inverted, making it hard to code an interrupt
routine to do anything cleanly.

I forget which interrupt gets triggered when you enable vertical interrupts,
but I know that it is shared with other devices, so even when you do see
the interrupt go off you have to query the display board to see if it caused
the interrupt or not. Note that different boards trigger this interrupt
at different rates (anywhere between 50-70Hz?) 

In general, you have to have a pretty driving need to do things this way.
You can probably do just fine, generating your image as fast as you can
to one screen, flipping to it and generating the next image to the other
screen.
--
"As sensitive and broad-minded humans, we must never allow ourselves to be
in any way judgmental of the religious practices of other people, even when
these people clearly are raving space loons."		Dave Barry
smayo@wang.com
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