🚀 go-pugleaf

> I'm not sure that this is true. What happens at each stage is a permutation
> and an xor. If each stage doesn't have to share the permutation logic, then
> its simply wires, not lots of wires + a 16 way mux

Each round in DES involves an expansion, exclusive-OR, a ROM table
lookup (the S-boxes) followed by a permutation (P-boxes) and then
another exclusive-OR.  Except for the Initial Permutation (IP) and
Reverse Initial Permutation (IP-1) which you could factor out of the
algorithm and do once externally, *all* of the work in encrypting and
decrypting has to be repeated at each round.  You also need to generate
different sub-keys for each round. So I think an estimate of 16x chip
area for a pipelined DES chip over a non pipelined version is reasonable.

While wires may be "free" in terms of propagation time, they are not at all
free in terms of chip area. Complicated wire crossings like the P boxes
in DES may take up a considerable amount of real estate, making the chip
much less dense than a regular device like a RAM.

Phil