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Article #40Re: 4 layer PCB (from 2 layer) + array of designs on one board
From: Peter Bennett
Date: Mon, 25 Dec 2006 18:16
Date: Mon, 25 Dec 2006 18:16
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4790 bytes
On 24 Dec 2006 22:55:41 -0800, "Vitaliy" <m.vitaliy@gmail.com> wrote: >Hello, > >My appplication is light detection -> using photodiodes and >transimpedeance amplifier (OPA657 from Texas Instruments). At this >point I have 2-layer working design. I need to increase the bandwidth >of the detector (from 10MHz to 40MHz) and try to reduce noise (also >reducing noise is always welcome, of course). I'm thinking about using >two inner layers for +5V and -5V power layers (I'm using free space on >top and bottom layers for ground layer). +-5V is currently connected to >the board from external power supply by soldering two wires (one for >+5V and one for -5V). I am using +-5V to bias photodiodes and to power >the opamp. The software I'm using is OrCAD. Even if going to 4 layer >from two wouldn't give me a significant improvement in terms of >reducing the noise level, I would like to know the answers for the >following questions. > >1) Will traferring +-5V to separate layers (rather than just have the >power traces with filters) work? Since the inner layer is most likely >to be .5oz copper as opposed to 1oz copper of outer layers. There is no >way to specify that in gerber file, right? Will creating a power layer >give me more stable voltage (and high capacitance)? That's why people >are using multilayers as opposed to two layers, right? I guess I will >still need some decoupling capacitors at the vias. Gerber files only specify the copper patterns that are to appear on the board. Any other construction details, including copper weight, and the order of layers on a multi-layer board, must be specified separately. I have a standard format for a text file that includes such information. When laying out a multi-layer board, you should put a wide track at the edges of the board on the power or ground plane layers to keep the copper on those layers away from the edge of the board. (Anything you place on a plane layer will end up as "no copper" on the finished board.) > > >2) The price differential between 2 and 4 layer boards is quite steep, >and I can easily fit a few prototype boards on one board and then cut >them (or have it cut by manufacturer). What is the easiest way to place >array of differemt designs on one board? I only have access to OrCAD, >but it can generate gerber files, so maybe some other software can be >used. Are the manufacturers ok with this? I would prefer them to cut >the boards, if possible, since I probably wouldn't be able to do it as >well without special equipment. (Something tells me they woudn't be >willing to make x by x board, and then cut it in y pieces, but just >checking). I do realize I might be able to place three designs side by >side and not require any cutting, but that might not always work for >me. Discuss the matter with your board shop. If I have two or more boards that I want built on a common panel, I'll usually produce separate gerbers for each board, then ask the board maker to combine them on a single panel. However, a co-worker places multiple boards on a panel himself, and sends gerbers for the full panel to the board shop. Either way, the board shop will separate the individual boards if asked. If you panelize the boards yourself, you should first ask the board shop what separation they want between boards - they need some unused space to leave room for the router bit to go between boards. > >Merry Christmas, >Vitaliy -- Peter Bennett, VE7CEI peterbb4 (at) interchange.ubc.ca new newsgroup users info : http://vancouver-webpages.com/nnq GPS and NMEA info: http://vancouver-webpages.com/peter Vancouver Power Squadron: http://vancouver.powersquadron.ca
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X-Google-Thread: 111d0a,98c8f92c95d5cd79 X-Google-Thread: 112d1e,98c8f92c95d5cd79 X-Google-Thread: f849b,98c8f92c95d5cd79 X-Google-Thread: 103407,98c8f92c95d5cd79 X-Google-Attributes: gid111d0a,gid112d1e,gidf849b,gid103407,public X-Google-Language: ENGLISH,ASCII-7-bit Path: arc1-ca.pugleaf.net!g2news2.google.com!news3.google.com!sn-xt-sjc-04!sn-xt-sjc-07!sn-post-sjc-01!supernews.com!news.supernews.com!not-for-mail From: Peter Bennett <peterbb@somewhere.invalid> Newsgroups: sci.electronics.basics,sci.electronics.design,comp.arch.embedded,aus.electronics Subject: Re: 4 layer PCB (from 2 layer) + array of designs on one board Date: Mon, 25 Dec 2006 10:16:59 -0800 Organization: Home for the Hopelessly Helpful Message-ID: <eq40p2hdle264idcn1991ftkc0qo6v7bjh@news.supernews.com> References: <1167029740.938190.304470@n51g2000cwc.googlegroups.com> X-Newsreader: Forte Agent 1.93/32.576 English (American) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Complaints-To: abuse@supernews.com Lines: 72