🚀 go-pugleaf

RetroBBS NetNews Server

Inspired by RockSolid Light RIP Retro Guy

Article View: sci.electronics.basics
Article #44

Re: 4 layer PCB (from 2 layer) + array of designs on one board

#44
From: Vitaliy
Date: Wed, 27 Dec 2006 07:50
37 lines
3276 bytes
> Gerber files only specify the copper patterns that are to appear on
> the board.  Any other construction details, including copper weight,
> and the order of layers on a multi-layer board, must be specified
> separately.  I have a standard format for a text file that includes
> such information.
>
> When laying out a multi-layer board, you should put a wide track at
> the edges of the board on the power or ground plane layers to keep the
> copper on those layers away from the edge of the board.  (Anything you
> place on a plane layer will end up as "no copper" on the finished
> board.)
> >
I think I'm missing something: should I leave some space between the
edge of the board and power plane (which will be internal plane)?


> Discuss the matter with your board shop.  If I have two or more boards
> that I want built on a common panel, I'll usually produce separate
> gerbers for each board, then ask the board maker to combine them on a
> single panel.  However, a co-worker places multiple boards on a panel
> himself, and sends gerbers for the full panel to the board shop.
> Either way, the board shop will separate the individual boards if
> asked.  If you panelize the boards yourself, you should first ask the
> board shop what separation they want between boards - they need some
> unused space to leave room for the router bit to go between boards.
>
OK, I will look into panelizing the boards myself (also I would like to
panelize different designs (same # of layers though) on the same
board). If you can suggest a program that can take two gerber files and
create one board will be great (I'll check if this can be done in
OrCAD).


PS. I will respond to other suggestions a bit later on today.

Thanks a lot,
Vitaliy
Technical Details
Message-ID: <1167205813.690787.183770@42g2000cwt.googlegroups.com>
Path: arc1-ca.pugleaf.net!g2news2.google.com!postnews.google.com!42g2000cwt.googlegroups.com!not-for-mail
References: <1167029740.938190.304470@n51g2000cwc.googlegroups.com> <eq40p2hdle264idcn1991ftkc0qo6v7bjh@news.supernews.com>

Show Full Headers
Complete Article Headers
X-Google-Thread: 111d0a,98c8f92c95d5cd79
X-Google-Thread: 112d1e,98c8f92c95d5cd79
X-Google-Thread: f849b,98c8f92c95d5cd79
X-Google-Thread: 103407,98c8f92c95d5cd79
X-Google-Attributes: gid111d0a,gid112d1e,gidf849b,gid103407,public
X-Google-Language: ENGLISH,ASCII-7-bit
Path: arc1-ca.pugleaf.net!g2news2.google.com!postnews.google.com!42g2000cwt.googlegroups.com!not-for-mail
From: "Vitaliy" <m.vitaliy@gmail.com>
Newsgroups: sci.electronics.basics,sci.electronics.design,comp.arch.embedded,aus.electronics
Subject: Re: 4 layer PCB (from 2 layer) + array of designs on one board
Date: 26 Dec 2006 23:50:13 -0800
Organization: http://groups.google.com
Lines: 38
Message-ID: <1167205813.690787.183770@42g2000cwt.googlegroups.com>
References: <1167029740.938190.304470@n51g2000cwc.googlegroups.com>
   <eq40p2hdle264idcn1991ftkc0qo6v7bjh@news.supernews.com>
NNTP-Posting-Host: 74.99.207.27
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
X-Trace: posting.google.com 1167205818 8923 127.0.0.1 (27 Dec 2006 07:50:18 GMT)
X-Complaints-To: groups-abuse@google.com
NNTP-Posting-Date: Wed, 27 Dec 2006 07:50:18 +0000 (UTC)
In-Reply-To: <eq40p2hdle264idcn1991ftkc0qo6v7bjh@news.supernews.com>
User-Agent: G2/1.0
X-HTTP-UserAgent: Mozilla/4.0 (compatible; MSIE 6.0; Windows NT 5.0; .NET CLR 1.1.4322),gzip(gfe),gzip(gfe)
Complaints-To: groups-abuse@google.com
Injection-Info: 42g2000cwt.googlegroups.com; posting-host=74.99.207.27;
   posting-account=1Z6aeg0AAAD9jkv8-xbyDEkLhNl1_XOH