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Article #2025

Re: Simple crystal (4.43MHz - PAL) oscillator + PLL multiplier circuit wanted.

#2025
From: martin griffith
Date: Mon, 05 Mar 2007 19:00
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On Tue, 06 Mar 2007 05:37:18 +1100, in sci.electronics.design Lionel
<usenet@imagenoir.com> wrote:

>On Mon, 5 Mar 2007 09:13:34 -0500, "Tam/WB2TT" <t-tammaru@c0mca$t.net>
>wrote:
>
>>
>>"Lionel" <usenet@imagenoir.com> wrote in message 
>>news:ksknu25mu0q4p10p0qhi0u56uihln1ndde@4ax.com...
>>.....................................that a good starting place might be to 
>>use a CPU clock
>>> that's based on the PAL subcarrier frequency (4.43MHz) multiplied with
>>> a PLL+VCO+Divider to give me phase reference points, & directly
>>> generate the composite colour signal via an R2R ladder.
>>>
>>
>>You might want to consider the converese of that. 20+ years ago it was 
>>common in cheap computers here to start with an oscillator at 14.318 MHz, 
>>which was then counted down to the NTSC color subcarrier frequency of 3.579 
>>MHz. 14.318 is also an integral multiple of the horizontal and vertical sync 
>>frequencies. I see that 17.734475 is a standard crystal frequency. Is that 
>>4x the actual PAL frequency?
>
>Yes, it is. However, I don't know if it's high enough to give me
>enough samples to create a clean Chroma, etc. I'm pretty sure that
>I'll need to sample at a minimum of 8x (35.468950MHz) the base colour
>subcarrier frequency. I /hope/ I won't have to go as high as 16x
>(70.937900MHz). ;)
>That said, using 17.734475MHz means I'd only have to multipy it by 2
>or 4 to get my higher multiples, which may make life easier.

http://www.nxp.com/pip/SAA7121H_V2.html
may be of interest


martin
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From: martin griffith <mart_in_medina@ya___.es>
Newsgroups: sci.electronics.design,aus.electronics
Subject: Re: Simple crystal (4.43MHz - PAL) oscillator + PLL multiplier circuit wanted.
Date: Mon, 05 Mar 2007 20:00:24 +0100
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