🚀 go-pugleaf

In article 3c9f0b75.31395314@news.optusnet.com.au, Johnny at
john_wr100@yahoo.com wrote on 03/25/2002 06:50:

> On 24 Mar 2002 22:13:10 -0800, robert@wavemechanics.com (robert
> bristow-johnson) wrote:
> 
>> Al Clark <dsp@danvillesignal.com> wrote in message
>> news:<Xns91DB81B2F6D2aclarkdanvillesignal@209.249.90.101>...
>>> john_wr100@yahoo.com (Johnny) wrote in news:3c9db1ea.6888487
>>> @news.optusnet.com.au:
>>> 
>>>> On Sun, 24 Mar 2002 10:18:32 GMT, john_wr100@yahoo.com (Johnny) wrote:
>>>> 
>>>> I am planning on doing some experimentation with digital fitlers. I
>>>> want to make an active crossover for my audio system. I was looking at
>>>> one of the following kits:
>>>> 
>>>> Motorola DSP5636X Evaluation module.
>>>> or
>>>> Analog devices ADSP-21065L Ez-Kit lite
>>>> 
>>>> I probably need about 80 Million multiply/accumate per second and at
>>>> least 24bit fixed point. Faster is better though.
>>>> 
>>>> I dont mind programming in Assembly or C language.  I figure that
>>>> assembly is probably fine because my code should be pretty simple just
>>>> to implement FIR filters and  I/O functions.  I was kind of scared by
>>>> roughly 1000 pages of documentation for the motorola development
>>>> system and DSP programmers guide.
> 
> 
>> in either case, i would perform any FIR kernals in fixed-point.
> 
> Yes..  It seems like the Motorola is well suited to FIR audio filters
> with 24bit fixed point maths and 56bit accumulator.  (IIRC)

the SHArC also can do fixed-point (32x32 into an 80-bit accumulator).
that's what i meant be "either case".

> I also Think that 24bit is plenty good enough for audio.  But 32bit
> bit floating point is a lot like 24bit fixed point with an 8-bit
> exponent term.

well, it's *exactly* like a 25 bit fixed-point (there's a "hidden 1 bit")
with an 8 bit exponent.

>  Not sure how bit the SHARC accumulator is,

the fixed-point accumulator is 80 bits wide so you have no rounding error
until you cast your FIR result back to a smaller word size.  the
floating-point registers have 40 bits (so there are 8 "guard bits" below the
LSB to help reduce accumulated quantization error), but as my SHArC bitch
says, don't use the same floating-point register be used for both interrupt
handlers and for FIR accumulation lest you spuriously lose those 8 guard
bits in the middle of an FIR accumlation.  (probably a similar problem for
IIR, Direct Form 1, also.)

> but I  will
> check it out..The SHARC processors are a lot faster than the Motorola
> 56300 series.

yeah, i know.  and with the ADSP-21065L series (or whatever is newer) it's
pretty clear that Mot has not been keeping up.  it's sad because, as Al
said, Mot used to own the audio market.

>  So its not a problem for me that they do 32bit maths
> insted of 24bit.
> 
> The problem I normally have with Motorola processors is that they
> normally have 3rd party development tools which are far too expensive
> for the hobbiest.

what 3rd party tool do you need??  the assembler comes with the EVM, right?
i thought you were comfortable with asm.  the Tasking C compiler *is* very
costly but i don't know anyone who has it so i'm not sure how much it is
needed.

>  Based on past experience with Motorola embedded
> processors, the Evaluation boards are normally also super pricey.

never bought anything newer than the DSP56002EVM, that was US$150 in 1996.
i heard that the newer ones based on the 563xx something with stereo codecs
were around $200 in the U.S.  that might not be current.

>  To
> be honest, i have been too scared to even call the local Motorola
> distributer as they don't have a reputation for good pricing either.
> Maybe the 56000 dsps are an exception to the Motorola norm and worth
> checking out.

dunno.  you're in Australia, correct?  things might cost more down there.

-- 

r b-j

Wave Mechanics, Inc.
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Burlington        VT  05401-4750

tel: 802/951-9700  ext. 207          http://www.wavemechanics.com/
fax: 802/951-9799                    robert@wavemechanics.com

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