🚀 go-pugleaf

On Jan 12, 8:36 pm, John Larkin
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Thu, 12 Jan 2012 09:58:42 -0800 (PST),BillSloman
>
> <bill.slo...@ieee.org> wrote:
> >On Jan 12, 4:30 pm, John Larkin
> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> >> On Thu, 12 Jan 2012 02:11:46 -0800 (PST),BillSloman
>
> >> <bill.slo...@ieee.org> wrote:
> >> >On Jan 12, 3:13 am, John Larkin
> >> ><jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> >> >> On Wed, 11 Jan 2012 16:49:18 -0800 (PST),BillSloman
>
> >> >> <bill.slo...@ieee.org> wrote:
> >> >> >On Jan 11, 8:22 pm, Phil Hobbs
> >> >> ><pcdhSpamMeSensel...@electrooptical.net> wrote:
> >> >> >> On 01/11/2012 01:43 PM, John Larkin wrote:
>
> >> >> >> > On Tue, 10 Jan 2012 18:02:50 -0800 (PST),BillSloman
> >> >> >> > <bill.slo...@gmail.com> wrote:
>
> >> >> >> >> On Jan 10, 4:55 pm, John Devereux<j...@devereux.me.uk> wrote:
> >> >> >> >>> Robert Macy<robert.a.m...@gmail.com> writes:
> >> >> >> >>>> On Jan 10, 2:28 am,BillSloman<bill.slo...@ieee.org> wrote:
> >> >> >> >>>>> On Jan 10, 7:47 am, "David L. Jones"<altz...@gmail.com> wrote:
>
> ><snip>
>
> >> >> >> >> Motorola's ECL applications notes on board layout were rather useful,
>
> >> >> >> > Just don't trust their microstrip equation!
>
> >> >> >They looked okay in the range 50R to 75R.
>
> >> >> Yup. And they give silly, even negative, impedances for traces outside
> >> >> a narrow width zone.
>
> >> >Which is more or less what I went on to say in the next paragraph -
> >> >you seem to suffer from premature ejeculation.
>
> >> You suffer from nostalgia for the times, decades ago, when you
> >> actually did things... most of which didn't work.
>
> >I do feel a certain amount of nostalgia for the times when I did
> >things - which all actually worked when management didn't cancel the
> >projects before we'd got to actual hardware. Management did frequently
> >decide that they couldn't sell the stuff that I was allowed to get
> >working.
>
> >All of this is entirely irrelevant to the observation that you went
> >off at half-cock, busily saying pretty much what I'd already posted,
> >but you couldn't find a way of justifying that, so you posted one more
> >of your inaccurate insults instead.
>
> I was talking about a Motorola data book, and you responded with a
> personal insult. You do that sort of thing a lot here. It's not
> surprising that people tended to not hire/keep you.

Please identify the personal insult - I wasn't actually intending to
insult you at that point so it would be useful if you indicated which
of your hyper-sensitive toes I trod on.

> >> >> >Specialised textbooks give
> >> >> >longer and more complicated expressions that give rather different
> >> >> >results for microstrips and strip-line with higher and lower
> >> >> >characteristic impedances.
>
> ><snip>
>
> >> >At current ECLinPS speeds everything gets averaged over a few
> >> >millimetres of track. The extra capacitance implicit in a right-angle
> >> >bend on a 5OR track might be perceptible, but you can pretty much
> >> >eliminate it by chamfering the corner, or making two 45-degree bends
> >> >in quick succession.
>
> >> That's what the ancient Moto book said. It was stupid at 10K speeds
> >> and it remains stupid at EclipsPlus speeds. I can barely discern a
> >> right angle with a zoomed-up 30 ps TDR edge. The weave of the
> >> fiberglass changes the impedance more than a sharp corner. Vias are
> >> hugely more important than right angles.
>
> >Obviously.
>
> >I'm a bit surprised that you are bothering to do time domain
> >reflectometry on FR-4 boards. Rogers make a bunch of substrates that
> >work rather better at very high frequencies. A Cambridge Instruments
> >we made the outer layers of six layer boards for the GaAs parts with
> >isocyanate-resin-bounded Teflon cloth. The inner layers (that weren't
> >exposed to the GaAs signals) were regular FR-4 which kept the board as
> >a whole rigid - they were triple extended Eurocards and we didn't want
> >them flopping around.
>
> Probably the cost of the boards contributed to the overall project
> failure.

The machine was priced to recover its development costs, not it's
component costs. Being "state of the art" was one of things that
marketing liked about the machine. The bare printed circuit boards
were expensive, but loading them with components cost more than buying
the boards.

> We do picosecond stuff on FR4 all the time. I do TDR and
> other tests on boards so I can understand them and learn stuff, and
> make sure my suppliers are doing the stackups right, and so that I can
> separate what matters from the masses of hand-waving "theory" that
> folks like HoJo sell.

We didn't buy HoJo's handwaving theory back then. IIRR he wasn't
peddling his stuff until the 1990s.  We got hold of rather more
reliable data from the microwave world.

> >Our printed circuit board supplier charged us extravagantly for the
> >boards - he had to buy a lot more of the isocyanate-resin-bonded
> >Teflon cloth substrate than he need to make up our first batch of
> >boards, and he knew we were pushing the state of the art, and - very
> >wisely - wasn't prepared to wait for us to order a production batch of
> >boards to cover the expenditure.
>
> The only thing you were pushing the state-of-the-art on was expense.
> The Moto ECL and GBL GaAs parts would work fine on FR4.

We had a few nasty experiences with with GaAs pulses that got
inadvertently routed over FR-4. The choice of the isocyanate resin-
bonded Teflon cloth substrate was driven more by a wish to minimise
potential risks than any deep analysis of what was going to happen to
the pulse shapes by the time they got to the other side of a big board
- one of the things that really screwed the project was an initial
desire to get it up and running fast, so design reviews were by-passed
to get boards out to layout as soon as possible, in the best English
tradition of not having enough time to do it right so you have to find
time to do it over.

Once we'd got the printed circuit department to get the boards made
with the buried layers in the right order, the boards materials didn't
give us any trouble.

The half-nanosecond wide pulse generator for generating the
stroboscopic flash of electrons inside the electron microscope was
actually built on an alumina-loaded Teflon daughter board - we'd
bought in a microwave consultant, and that was what he chosen. I'd got
a similar circuit working fine on a polyimide board a few years
earlier - HF transistors involve ran hot and the polyimide tolerated
it better than FR-4, which turned brown and worried the customers and
our service engineers - but it doesn't make sense to pay through the
nose for consultants (no matter how flakey) and ignore their advice.

> The exotic substrates seldom make sense for digital logic. If you have
> a *lot* of layers, over 8 maybe, a lower Er is handy to keep the trace
> widths and impedances practical.

These boards were "mixed signal". We used essentially analog circuits
to interpolate between the 800MHz digital clock edges - the aim was to
determine when an external trigger had come in to about 10psec, and
generate our sampling pulses at controlled intervals after that
trigger edge, with a resolution of 10psec. The fact that we had a crap
clock with some 50psec of jitter and our sampling pulse was 500psec
wide didn't stop marketing from insisting on the 10psec resolution.

> RF stuff can sometimes justify exotic laminates, to keep filter Qs up
> and noise figures down. High thermal conductivity laminates could be
> interesting.

We stuck individual heat sinks on most of the faster logic packages,
and blew a lot of air through the crate. When testing individual
sticking out of the crate on an extender card (which was fun to design
and get built) you had a big domestic fan blowing into your ear.

--
Bill Sloman, Nijmegen