🚀 go-pugleaf

On Mon, 20 Jul 2009 08:02:20 +1000, "David L. Jones"
<altzone@gmail.com> wrote:

>John Larkin wrote:
>> On Sun, 19 Jul 2009 22:04:25 +1000, "David L. Jones"
>> <altzone@gmail.com> wrote:
>>
>>> As promised, an expos� of an issue with the Rigol DS1052E
>>> oscilloscope in my latest video blog:
>>> http://www.alternatezone.com/eevblog/
>>>
>>> Dave.
>>
>> Do the scopes work?
>
>Yep, they work. So Rigol are obviously getting away with it by hook or by 
>crook.
>If AD are deliberately under-speccing their normal chips, then it's a clever 
>ploy by Rigol to exploit it.
>
>Dave.

We overclock/overstress parts when there's a substantial payoff. One
Freescale uP is rated for 16 MHz clock, actually gets wonky at 44, so
we run it at 20. One microwave schottky diode is rated for 2 volts
reverse, leaks a bit at 7, so we use it at 4. Adding a heatsink to an
FPGA can buy some timing margin. Some diodes and cmos parts leak four
or five orders of magnitide less than the datasheet guarantees. An
0603 resistor can dissipate a quarter of a watt safely. The trick is
to take calibrated risks where there's demonstrated margin and big
paybacks, and take zero risk everywhere else.

John