🚀 go-pugleaf

At work I have been given the task to design and build a power amplifier
with roughly the following specs: output power 5000W av. during 10 ms,
load 50 ohm resistive, off-time 1.99 s, -3dB bandwidth: 38 kHz +- 5 kHz,
linear mode, solid state, mains powered (240 V/ 50 Hz).

I was wondering if anyone has some useful suggestions/ideas for designs,
literature, application notes, and suitable semiconductors.

At the moment I am having a play with a prototype that I knocked up, it uses
two separate class B push-pull amplifiers employing a pair of identical T-MOS
FETs, each amplifier is to deliver 2.5 kW. 
The FETs are driven in anti phase, the drains connected to a centre tapped
output transformer.
The FETs are Motorola MTM15N50 found in a dusty corner, rated at Vds,br = 500 V
and Id,br = 15 A DC or 65 A pulsed. The load impedance of each FET is 18 ohms.
For a supply I intend to use a bank of capacitors charged via a bridge and a
variac up to 300 V.
I have some reservations about the linear behaviour of these switch-mode
devices. Dissipation doesn't seem to be a problem, considering the duty cycle.
The load line fits Motorola's SOA curves for forward bias. The output
transformers came in yesterday, it'll be interesting to see how it goes.

In the mean time I'd appreciate serious hints. No doubt there are better ways
to go about it.
Feel free to E-mail me at: wk@frc.maf.govt.nz or post a reply. 

Cheers, Bert.