🚀 go-pugleaf

<265@salt.bellcore.com>, rtm1@salt.bellcore.com (Ravi Masand) writes:
> Does anyone know of a T-1 transceiver chip  with a
> microprocessor interface ? Or any combination of chips
> that will allow me to originate/terminate T-1 data in
> a microprocessor ?

Look at the "Dual T1 ESF/Clear-Channel Terminal Framer" (UGA-300-x)
from Base 2 Systems.  I have used it in several designs and am very
happy with it.  If you need to handle ZBTSI (Zero Byte Timeslot
Interchange) zero suppression, it is the only one generally available 
that I know of.

*** Anyone out there know of another ZBTSI framer? ***

It handles most framing formats (SF, ESF, none) had transmit and
received robbed-bit signaling buffers, a 2-frame slip buffer, a HDLC
controller for terminating the ESF 4kb/s datalink. and more.

The buffer and framing functions use an external fast (35 ns) 2kbyte
RAM.  This framer is very good in its handling of signaling, and provides
for per-channel substitution of fixed patterns for data.  Lots more...

This chip is a dual framer, but Base 2 is planning a single-framer
version.  This chip is more expensive than the Dallas Semiconductor
or the Mitel/Level One framers, but once you put the glue around
these other ones the Base 2 framer looks pretty good.  If you need
the extra functionality (the other framers are flawed for some
applications), the Base 2 part is the clear winner.

Oh yes, it has a micro interface, via a multiplexed 8 bit address/data
bus and a few control pins.  It can interrupt the processor for various
conditions.

Base 2 also makes ADPCM products, and other T1 chips.

Contact:

Base Two Systems Inc.
5353 Manhattan Circle #201  <--- may have changed?
Boulder, Colorado 80303
303-494-4484 (voice)

p.s.  I am always interested in hearing about / discussing T1 framers,
line interface, synchronizers, jitter/wander issues, and related design issues.
If you want to post on these topics you have at least one guaranteed reader!




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