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Article #1064

Xilinx

#1064
From: Neil McKenzie
Date: Thu, 03 Aug 1989 18:47
30 lines
1974 bytes
Hello netlanders.  I'm using the Xilinx Logic Cell Arrays (LCAs)
and I'm interested in other people's anecdotes, experiences, etc.

The Xilinx chips fit somewhere in between PALs and gate arrays.  They
have a lot of nice features: they are electrically reprogrammable;
every I/O pin can be configured as an input, output or bidirectional pin,
they have a fair number of usable gates, configurable routing, and
their parts are rated as fast as 70 MHz.

The difficulty with Xilinx is that once circuits become complicated, they
become routing-limited, and long routes use CMOS pass-transistors, which
can lead to slow switching.  Designs might only run at 5 to 10 MHz, even
though internally the flip-flops can switch at 70 MHz.

Xilinx also sells a software development system for doing automatic
placement and routing (APR) of the internal logic blocks.  For small designs,
it's adequate, but for larger designs, the result can be a slow running
circuit.  I have heard that many people who want the max speed will
abandon the APR and just do everything by hand, which can be a very tedious
process.

Do you netlanders use competing products (Altera, Actel)?  How do they stack
up, especially in terms of speed?  As far as I know, Xilinx has the only
electrically reprogrammable chips.  This is a *really nice* feature.
I get somewhat paranoid about programming a "burn-once" part that costs
more than a few bucks.

Hope to start some discussion (with light, without too much heat)...

--Neil McKenzie (mckenzie@june.cs.washington.edu)
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From: mckenzie@june.cs.washington.edu (Neil McKenzie)
Newsgroups: sci.electronics
Subject: Xilinx
Message-ID: <8897@june.cs.washington.edu>
Date: 3 Aug 89 18:47:27 GMT
Reply-To: mckenzie@uw-june.cs.washington.edu (Neil McKenzie)
Organization: University of Washington, Computer Science, Seattle
Lines: 30