🚀 go-pugleaf

In article <1dnt1fINNk0f@uranium.sto.pdb.sni.de> Josef Moellers <mollers.pad@sni.de> writes:
>........................
>You don't need any provisions for a cache, i.e. none in particular.
>All You need is a means to temporarily suspend operation of the CPU
>while You process a cache miss.
>........................

Yeah, well, I do know in a general way how caches operate. What I
don't know is how they are implemented with a 68000. What kind of
hardware will do the job, that sort of thing. Are any IC's available
for the purpose, for example? What do the accelerators use? I've
never seen one...
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Sakari Aaltonen                             Helsinki University of Technology
Email: sakaria@vipunen.hut.fi               ---- Finns Do It in the Snow ----