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Article #14536

Re: Logic Addition

#14536
From: John Haddy
Date: Sun, 15 Nov 1992 23:47
60 lines
2718 bytes
In article <#-t1l#n@rpi.edu>, wilusd@cary115.its.rpi.edu (David John Wilusz) writes:
|> 
|> 	Perhaps sci.electronics is not the place for this, but where is?  
|>	Could someone give me the configuration of gates that allows binary
|>	numbers to be correctly added?
|> 	Thanks for any help...
|> 
|> 	Dave
|> 


The best way for many applications is to use an ALU chip, such as a 74381; or a
27283 full adder.

Otherwise, an adder may be implemented in a bit slice fashion, with a series of
1 bit adders strung together. This leads to problems with ripple carry times if
your application requires high speed, so you'll have to design an N bit full
adder from the ground up if your timing is critical, or use a look-ahead carry
generator (also standard TTL).

However, assuming that the bit-slice implementation fills your needs:

	  Carry			   Carry
	   In	| Inp A	| Inp B	||  Out	| Output
	   Ci	|   A	|   B	||	|
	=========================================
	   0	|   0	|   0	||   0	|   0
	   0	|   0	|   1	||   0	|   1
	   0	|   1	|   0	||   0	|   1
	   0	|   1	|   1	||   1	|   0
	   1	|   0	|   0	||   0	|   1
	   1	|   0	|   1	||   1	|   0
	   1	|   1	|   0	||   1	|   0
	   1	|   1	|   1	||   1	|   1

The carry out from bit N feeds to the adder for bit N+1. Obviously, in bit
position 0, there is no carry in, so the adder can be reduced to what is known as
a half adder.

Half Adder:	Out	= A xor B
		Carry	= A and B

Full Adder:	Out	= (A xor B) xor Ci
		Carry	= (A and B) or (A and Ci) or (B and Ci)

Gate level implementation depends on what you have around. Refer to Horowitz and
Hill for examples of implementations of the XOR function.

JohnH

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From: johnh@macadam.mpce.mq.edu.au (John Haddy)
Subject: Re: Logic Addition
Message-ID: <1992Nov15.234707.9734@mailhost.ocs.mq.edu.au>
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Organization: Macquarie University, Sydney
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Date: Sun, 15 Nov 1992 23:47:07 GMT
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