Re: Please help: clock doubling

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Article #14894

#14894

From: Michael Covington
Date: Mon, 14 Dec 1992 05:41

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Phase-locked loop with divide-by-2 in the feedback loop?
74HC4046 and a flip-flop, perhaps...

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Path: arc1-ca.pugleaf.net!sparky!uunet!usc!wupost!emory!athena.cs.uga.edu!aisun3.ai.uga.edu!mcovingt

References: <1992Dec10.103424.9885@drdhh.hanse.de>

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Newsgroups: sci.electronics
Path: arc1-ca.pugleaf.net!sparky!uunet!usc!wupost!emory!athena.cs.uga.edu!aisun3.ai.uga.edu!mcovingt
From: mcovingt@aisun3.ai.uga.edu (Michael Covington)
Subject: Re: Please help: clock doubling
Message-ID: <1992Dec14.054100.13939@athena.cs.uga.edu>
Keywords: freq, digital, doubling
Sender: news@athena.cs.uga.edu
Organization: AI Programs, University of Georgia, Athens
References: <1992Dec10.103424.9885@drdhh.hanse.de>
Date: Mon, 14 Dec 1992 05:41:00 GMT
Lines: 8

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