Article View: sci.electronics
Article #15056Help with J-K Flip Flop
From: Robert Gallant
Date: Fri, 20 Nov 1992 13:25
Date: Fri, 20 Nov 1992 13:25
32 lines
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1136 bytes
Does anyone know the pin assignments to configure a 4027 dual J K flip flop to be a divide by 3. I have a diagram from a 1980 Radio Shack book but it does not seem to work correctly. (but their circuit for div. by 2 or 4 do work). Here's what they have for a divide by 3: pin 1 out(Q2) pin 2 to pin 10 (q2 to J1) pin 3 to pin 13 to input (clock inputs) pin 4 ground (R2) pin 5 to pin 14 (K2 to q1) pin 6 to pin 15 (J2 to Q1) pin 7 ground (S2) pin 8 ground (ground) pin 9 ground (S1) pin 10 [see pin 2] pin 11 V+ (K1) pin 12 ground (R1) pin 13 [see pin 3] pin 14 [see pin 5] pin 15 [see pin 6] pin 16 V+ (supply) Note: q is the Q with a bar over it. Does this look correct? Thanks alot Rob gallant@oasys.dt.navy.mil
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Path: arc1-ca.pugleaf.net!sparky!uunet!dtix!oasys!gallant From: gallant@oasys.dt.navy.mil (Robert Gallant) Newsgroups: sci.electronics Subject: Help with J-K Flip Flop Message-ID: <27715@oasys.dt.navy.mil> Date: 20 Nov 92 13:25:02 GMT Reply-To: gallant@oasys.dt.navy.mil (Robert Gallant) Organization: Carderock Division, NSWC, Bethesda, MD Lines: 32