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Article #15268RE: Help with refresh/record scheme needed!
From: Ernie Oporto
Date: Sat, 21 Nov 1992 22:45
Date: Sat, 21 Nov 1992 22:45
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>Its a long time since I played with DRAMS, but I would think that with
>a bit of judicious programming you may be able to avoid a refresh
>circuit. As long as you access all rows (columns?) within 4 ms the ram
>gets refreshed, so while you're recording you'll be refreshing anyway,
>ditto for playback. The rest of the time you could possibly arrange an
>interrupt routine every 4 mS to just read the necessary number of
>addresses if you can't build it into your program. If this is all B.S.
>then someone please say so :)
Well, that's the problem. To record properly, I need to access all rows
in 8 seconds, though I suppose with fast enough clocking, I can access
all the rows in between the recorded bit cycles. It will take 8 seconds
to fill the 256Kb x 8-bit memory at 32kHz sampling. BTW, the circuit is
going to be self-contained, so no computer will be hooked up to it for
software programming. What I see happening is that after 4ms of recorded
message, the first set of 4ms will erase as the second 4ms records.
---
"No time to sleep, so I've lost all my dreams" --Metal Church
_____) ______ _) _) EAO102@PSUVM.PSU.EDU
__ __ OPORTO@CORVETTE.ECE.PSU.EDU
______ ______ ___ ___ Ernie "SHOKK" Oporto
__ __ Computer Lab Attendant
(_______ _ _ ________ _ _) _ _) for PSU's CAC Department
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Path: arc1-ca.pugleaf.net!sparky!uunet!zaphod.mps.ohio-state.edu!cs.utexas.edu!rutgers!psuvax1!psuvm!eao102 From: EAO102@psuvm.psu.edu (Ernie Oporto) Newsgroups: sci.electronics Subject: RE: Help with refresh/record scheme needed! Message-ID: <92326.174552EAO102@psuvm.psu.edu> Date: 21 Nov 92 22:45:52 GMT References: ,<92322.002218EAO102@psuvm.psu.edu> <2b0a0a91.de77@grace.cri.nz> Organization: The Pennylvania State University Lines: 24