Article View: sci.electronics
Article #16521Re: PC VLSI Design package
From: LEEK
Date: Thu, 07 Jan 1993 05:51
Date: Thu, 07 Jan 1993 05:51
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In article <1ickg8INNgt0@sdl.Warren.MENTORG.COM>, garyg@warren.mentorg.com (Gary Gendel) says: > >for the hobbiest, however, we have been toying with releasing a restricted >version (no more than 500 elements) of out logic simulator, SIMIC for no >charge. This simulator has been claimed by many as the best gate/switch level >simulator available anywhere. The biggest hurdle is condensing our >300+ user manual into a small text file. Make money $$$ by sell the manuals... :) >Since SIMIC elements range from simple gates to large functional blocks (RAMS, >PLAS, etc) the 500 part limit should allow most hobby and educational designs , >but prevent competition with our commercial product. Sound good. There is just one catch... What can people do with the package ? Would be nice to support Xilinx's SRAM based FPGA or Lattice's ispLSI or similar devices. (Can restrict to only a few chips.) These device can probably be programmed from parallel port. Anything thing else would require an expensive programmer which sort of restrict the market. >We just need to determine if there is enough interest to warrant this effort. Yeap. There is always a segment of the lower end that have been overlooked by the big companies. EPLD are kind of small... :( >Gary Gendel >VP Customer Relations >Genashor Corp >9 Piney Woods Drive >Belle Mead, NJ 08502 >(908) 281-0164 > K. C. Lee Elec. Eng. Grad. Student Would be nice to see a Commodore Amiga version too. :)
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Path: arc1-ca.pugleaf.net!sparky!uunet!cs.utexas.edu!torn!news.ccs.queensu.ca!qucdn!leek Organization: Queen's University at Kingston Date: Thu, 7 Jan 1993 00:51:49 EST From: <LEEK@QUCDN.QueensU.CA> Message-ID: <93007.005149LEEK@QUCDN.QueensU.CA> Newsgroups: sci.electronics Subject: Re: PC VLSI Design package Distribution: world References: <1993Jan5.170428.12546@galileo.cc.rochester.edu> <1ickg8INNgt0@sdl.Warren.MENTORG.COM> Lines: 38