Article View: sci.electronics
Article #16691RE: Counter
From: srgxnbs
Date: Thu, 28 Jan 1993 02:52
Date: Thu, 28 Jan 1993 02:52
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1279 bytes
>From: flux@sys6626.bison.mb.ca (John Kamchen) >Subj: Counter >Date: 27 Jan 93 07:07:13 GMT > >I'm using a great chip from Avesem, a Video Genlock PLL chip, and I need >to design a counter that counts to 1818, then resets back to zero (with >some kinda \RCO when it hits 1818). >I've looked through all my TTL data books, and nothing really strikes me >as being 'right' for this application. >The input clock pulse is 28mhz, so that rules out CMOS parts. >Any ideas? I've got two kick-ass projects I can use this chip in, and >I can't do anything untill I figure out a counter. > >-John >SSE BBS (204)589-1078 v32bis AmiTronics- MEGS of 'em isn't there a standard TTL/LSTTL divide by 12 counter comprising a /2 and /6 stages? If so use the /6 stage to reduce your 28MHz to 4.667 MHz and then use a CMOS counter suitably decoded to divide by 303 ...? Bruce
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Path: arc1-ca.pugleaf.net!sparky!uunet!comp.vuw.ac.nz!zephyr.grace.cri.nz!zephyr.grace.cri.nz!usenet From: srgxnbs@grace.cri.nz Newsgroups: sci.electronics Subject: RE: Counter Date: Thu, 28 Jan 93 02:52:52 GMT Organization: Industrial Research Ltd., New Zealand. Lines: 21 Message-ID: <1ka67oINN348@zephyr.grace.cri.nz> References: ,<qmX1XB1w165w@sys6626.bison.mb.ca> NNTP-Posting-Host: grv.grace.cri.nz