Article View: sci.electronics
Article #19371Vero Wire Circuit Prototyping System
From: Andrew B Smith
Date: Wed, 06 Jul 1988 11:31
Date: Wed, 06 Jul 1988 11:31
43 lines
2237 bytes
2237 bytes
Hi, I am looking into the use of the 'Vero Wire' prototyping system for the construction of a small micro board. For those of you who do not know what 'Vero Wire' is (it may have a different name in your country) I shall explain. Vero Wire is a wiring system for creating prototype circuit boards. It consists of a pen and 30 SWG wire (I think may be thinner). The wire is copper and insulated. The user takes the wire and wraps it round the leg of an IC/component/socket and takes the wire onto a plastic comb. The wire is then routed along a series of combbs to the other components to which connections are required. When the routing for a particular wire is done the wraped connections are soldered to break the insulation and make a joint. This prototyping system has the advantage over wire-wrap in that the boards are much thinner (the same as a PCB). I would like to hear from people who have had experience with this system and the problems they have encountered (reliability, and types of circuit it is suitable for). I am interested in the effects of noise and crosstalk on the wires, and the sorts of speed of micro you can build. If I get a positive response and development looks promising I shall post an account of my experiences. Thank you, Andrew Smith. ------------------------------------------------------------------------- | Andrew B Smith | UUCP: andrew@kcl-cs.UUCP Dept. of Computing, | JANET: UDAC041@UK.AC.KCL.CC.VAXA King's College London, | BITNET, The Strand, | EARN: UDAC041%VAXA.CC.KCL.AC.UK@UKACRL.BITNET LONDON WC2R 2LS | United Kingdom | TPHONE: 01-836-5454 ext: 2239 | -------------------------------------------------------------------------
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!water!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!mailrus!ames!lll-tis!helios.ee.lbl.gov!pasteur!ucbvax!decwrl!sun!pitstop!sundc!seismo!uunet!mcvax!ukc!warwick!kcl-cs!andrew From: andrew@kcl-cs.UUCP (Andrew B Smith) Newsgroups: sci.electronics Subject: Vero Wire Circuit Prototyping System Keywords: vero wire Message-ID: <188@lithium.kcl-cs.UUCP> Date: 6 Jul 88 11:31:06 GMT Organization: Department of Computing, King's College London Lines: 43