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Article #19449

Re: Vero-wire circuit prototyping system

#19449
From: sdp
Date: Tue, 19 Jul 1988 07:43
26 lines
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In article <3281@cadnetix.COM> rusty@cadnetix.COM (Rusty) writes:
>If you build a prototype with such a system, test it immediately,
>and then toss it aside, the prototype systems are pretty slick.
>
>HOWEVER, the wires are VERY sensitive to stress.  Like, removing the IC
>more than once or twice; flexing the board, touching the wires too often,
>etc.  can give you the best intermittents you have ever seen.  

We are talking about the 3M prototyping system where wires are pressed into
narrow grooves in the pins on the back of the board, right?

My experience with this was much the same as Rusty's.  I had to build a ROM
emulator sort of thing to use as a tool, not a prototype.  Being a software
guy, and having had bad luck with wire-wrap before, I thought this 3M stuff
would be great.  Through the assembly and debugging stage, it was much more
convenient than wire wrap.  After a week or two, things started getting
flakey.  I thought about soldering all the wires in place after the thing
was debugged, but the sockets and other plastic parts seemed to melt easily.

Next time I'll do it right.  I'll get a hardware tech to do it for me.

Scott Peterson
OMSO Software Engineering
Intel,  Hillsboro OR
sdp@sdp.hf.intel.com
uunet!littlei!foobar!sdp!sdp
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Message-ID: <315@gandalf.littlei.UUCP>
Path: arc1-ca.pugleaf.net!utzoo!attcan!uunet!littlei!sdp
References: <187@lithium.kcl-cs.UUCP> <1329@ssc.UUCP> <3281@cadnetix.COM>

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Path: arc1-ca.pugleaf.net!utzoo!attcan!uunet!littlei!sdp
From: sdp@littlei.UUCP (sdp)
Newsgroups: sci.electronics
Subject: Re: Vero-wire circuit prototyping system
Keywords: vero wire prototype
Message-ID: <315@gandalf.littlei.UUCP>
Date: 19 Jul 88 07:43:26 GMT
References: <187@lithium.kcl-cs.UUCP> <1329@ssc.UUCP> <3281@cadnetix.COM>
Reply-To: sdp@.UUCP (Scott Peterson)
Organization: OMSO iRMX Software Engineering - Intel Corp. - Hillsboro Or.
Lines: 26