🚀 go-pugleaf

In article <1309@milton.acs.washington.edu> whit@milton.acs.washington.edu (John Whitmore) writes:
>
>  ... about an EE TIMES article covering a Japanese 4-chip computer
>  built of Josephson Junctions ....
>
>The speed/power product for this technology is very good; the
>Japanese group claims 6.2 milliwatts for a 1 MFLOP machine.
>
> ...it's Harvard architecture, by the way; 10 bit instructions
>and four bit data ...


Contained within the 4 chips are a total of 26,000 Josephson junctions,
which implement approximately 8,500 logic gates (2100 gates/chip).  This
is why it's a 4-bit computer - they didn't have very high LSI density.

Power is supplied to the devices in AC form; it's two out-of-phase sine
waves at 1.02 Gigahertz, with peak-to-peak amplitudes of 100 millivolts.
To supply 6.2 milliwatts of power (RMS) to the chips, these sine waves
must deliver 175 milliamps, 88mA apiece.  Pity the poor devil who has to
provide a scaled-up computer (say, a 16-bit machine) with a pair of 3 GHz
sinewaves deivering a quarter of an amp :-(.

The logic levels in this JJ technology are 0.0025 volts apart.  Works fine
on-chip, but it may present difficulties communicating off-chip to, say,
ECL caches.  You gotta have a voltage gain of about 200x to get the
amplitude up to 500mV for ECL.  This may prove difficult to do quickly;
consider the necessary gain-bandwidth product.
-- 
 -- Mark Johnson	
 	MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
	(408) 991-0208    mark@mips.com  {or ...!decwrl!mips!mark}