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Article #22493Re: SLAM's
From: Henry Spencer
Date: Fri, 02 Mar 1990 17:09
Date: Fri, 02 Mar 1990 17:09
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In article <22602@unix.cis.pitt.edu> fmgst@unix.cis.pitt.edu (Filip G.) writes: > I once read an article, in BYTE I think, that described > SLAMS, or Scan Line A???? Memory. Basicly, the concept was > to make a memory chip that was to make access to a > single scan-line much faster than usual schemes of > using 2-port ram or standard RAM. Very promising for > high speed systems but I have not heard of it SINCE. This sounds much like VRAMs, which are standard production items now. These are DRAMs plus an on-chip shift register that can be loaded from a row of DRAM data in one operation and then clocked out serially at high speed. Much used for video displays (that's what the V is) and also getting attention for memory systems for fast processors (which often do sequential reads for things like cache fills). -- MSDOS, abbrev: Maybe SomeDay | Henry Spencer at U of Toronto Zoology an Operating System. | uunet!attcan!utzoo!henry henry@zoo.toronto.edu
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Newsgroups: sci.electronics Path: arc1-ca.pugleaf.net!utzoo!henry From: henry@utzoo.uucp (Henry Spencer) Subject: Re: SLAM's Message-ID: <1990Mar2.170948.1037@utzoo.uucp> Organization: U of Toronto Zoology References: <22602@unix.cis.pitt.edu> Date: Fri, 2 Mar 90 17:09:48 GMT