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Article #22583Elantec EL2142C line receiver latchup problem
From: David L. Jones
Date: Mon, 08 Apr 2002 05:42
Date: Mon, 08 Apr 2002 05:42
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1809 bytes
Has anyone had any problems with the inputs on the Elantec EL2142C diff line receiver latching up and causing excess current drain? I appear to be having this problem, and the chip is drawing up to an extra 100mA for some reason. I'm using the device in the standard twisted pair application as shown in the data sheet (single resistor feedback), with a terminated diff input (but no signal connected). The current drops back to normal if I single-end one of the inputs to ground. It's not the chip, I've changed it, power rails are clean and decoupled, no oscillation, Vref at ground, and the output is not driving any significant load. Any ideas? Thanks Dave :)
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 112d1e,3995c030be69f7b2,start X-Google-Attributes: gid112d1e,public X-Google-Thread: 105d97,3995c030be69f7b2,start X-Google-Attributes: gid105d97,public X-Google-Thread: 103407,3995c030be69f7b2,start X-Google-Attributes: gid103407,public X-Google-Thread: 1118be,3995c030be69f7b2,start X-Google-Attributes: gid1118be,public X-Google-ArrivalTime: 2002-04-07 22:42:45 PST Path: arc1-ca.pugleaf.net!archiver1.google.com!postnews1.google.com!not-for-mail From: dljones@ozemail.com.au (David L. Jones) Newsgroups: sci.electronics,sci.electronics.design,sci.electronics.components,aus.electronics Subject: Elantec EL2142C line receiver latchup problem Date: 7 Apr 2002 22:42:44 -0700 Organization: http://groups.google.com/ Lines: 16 Message-ID: <734fad6f.0204072142.5b3c9d7e@posting.google.com> NNTP-Posting-Host: 203.55.203.247 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1018244565 16333 127.0.0.1 (8 Apr 2002 05:42:45 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: 8 Apr 2002 05:42:45 GMT