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Article #2983Re: Tying LSTTL inputs to Vcc?
From: David F. Skoll
Date: Thu, 16 Apr 1992 20:47
Date: Thu, 16 Apr 1992 20:47
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In <1992Apr16.154345.11907@ucsu.Colorado.EDU> rainer@spot.Colorado.EDU (Rainer Malzbender) writes: >In article <dfs.703361967@ro> dfs@doe.carleton.ca (David F. Skoll) writes: >>I'm using some LSTTL parts in a circuit I'm building, and some inputs >>have to be tied to a constant logic "1". >> >>Why in most designs I've seen do people use >>either the resistor or spare gate method? >I always thought the reasoning had to do with current limiting in the event >of a catastrophic failure by the chip containing the pull-up. Without a >resistor you could short out the power supply, although that doesn't seem >to be such a big deal any more. Certainly for home hacking I never use >resistors. I'd imagine that shorting the power supply through a chip would pretty quickly burn the bonding wire or power metalization in the chip. One other reason someone mentioned (that I had forgotten) was that using a resistor makes it easy to change the value on the pin for test purposes. That's why some designs have a logic "0" tied to the output of an inverter whose input is tied to Vdd through a resistor... (whew.) In summary, as William McFadden and Brian Rhodefer wrote to me, LSTTL inputs are really DTL inputs, and don't need the resistor for protection. -- David F. Skoll
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Newsgroups: sci.electronics Path: arc1-ca.pugleaf.net!sparky!uunet!cs.utexas.edu!utgpu!cunews!dfs From: dfs@doe.carleton.ca (David F. Skoll) Subject: Re: Tying LSTTL inputs to Vcc? Message-ID: <dfs.703457241@ro> Sender: news@cunews.carleton.ca (News Administrator) Organization: Dept. of Electronics, Carleton University References: <dfs.703361967@ro> <1992Apr16.154345.11907@ucsu.Colorado.EDU> Date: Thu, 16 Apr 1992 20:47:21 GMT Lines: 30