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Article #3094

Re: Bus Termination

#3094
From: Carl Wuebker
Date: Sun, 17 Sep 1989 18:27
43 lines
2656 bytes
     A personal opinion:

     * Things which are called backplane terminations are usually not; that is,
       they reduce but don't eliminate reflections from the open ends of the
       backplane.  Typical PC traces have unloaded Z's on the order of 40 (over
       ground planes) to 110 ohms.  Loaded Z's can be lower.  Most terminators 
       have Ztotals of 132 ohms (220/330) or higher.

     * Backplane designers rely on input clamp diodes to terminate negative
       going swings (and prevent rebounding above 0.8v).  With 220/330 or 
       330/390 resistors on the bus, positive going swings aren't generally
       too much of a problem (I don't know why, though).

     * There are 3 reasons to prefer TTL type voltage swings (0~3v) over CMOS
       voltage swings (in my humble opinion):

       > Power.  In a capacitively loaded bus, the bus drivers will dissipate
         dynamic power proportional to V^2, where V is the voltage swing.  This
         adds heat to the design.

       > Compatability with TTL.  When a bus point is driven from 0 to 5v, an
         open end of the bus can double the voltage (0->8 or 9v in practice).
         This exceeds TTL input specs (7v), and causes CMOS clamp diodes to 
         activate harder.  Of course, the larger energies in the larger swings 
         may mean more EMC, too.

       > System considerations.  TTL is designed so that its input looks like
         an open circuit when the gate is powered down (be careful in powering
         up and down -- some bidirectional buffers oscillate when powered with 
         1.8v or so).  This permits two boxes on a bus to communicate while a
         3rd one (on the bus) is powered down.  CMOS generally has an internal
         clamp diode to Vdd, so a high signal connected to the input of an
         unpowered box may try to power it up -- what usually happens is that
         Vdd has resistance to ground, so the signal is clamped.
        
     * Running CMOS from 3v fixes the first two concerns, but slows the CMOS 
       down.

     These are my own opinions, and not those of my employer.

Thanks,
   Carl Wuebker * clw@hprnd * HP Roseville Networks Division * (916) 785-4296
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From: clw@hprnd.HP.COM (Carl Wuebker)
Newsgroups: sci.electronics
Subject: Re: Bus Termination
Message-ID: <1100003@hprnd.HP.COM>
Date: 17 Sep 89 18:27:55 GMT
References: <22144@cup.portal.com>
Organization: HP Roseville Networks Division
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