🚀 go-pugleaf

In article <409@horizon.COM> kevin@horizon.COM (Kevin Criqui) writes:
>  ...
>working, I found that the 8 MHz system clock is quite noisy. 
>  ...
>Does anyone out there have any advice for me?  If you've successfully
>wire wrapped a CPU based circuit that ran at 8 MHz (or higher), I'd
>like to hear how you did it.

Gosh, I don't know. I've wire-wrapped quite a few 68K circuits of the
type you describe, and although I've had ugly looking clock signals,
that never turned out to be the cause of any bugs. It was always some
miswrapped wire or other. Be careful about distributing the clock - I
use monolithic oscillators and then buffer the clock with complementary
drivers (265) or inverters since usually I need two phases anyway. A
friend showed me a nice way to do power distribution, which may help:
take PCB board stock, cut into little strips about 1/4" wide by several
inches long. Then attach wire wrap pins (T44), about one every inch,
alternating sides (make a little jig out of two pieces of perfboard spaced
about 1/2" to align the pins and hold them in place while soldering).
Finally, get a bag full of cheapo disc capacitors and solder them on to
the strips, one every inch or two. The final assembly just plugs into
your perfboard (pads per hole are best) and decoupling caps are already
mounted. You can whip these up in no time at all. The only drawback is that
the decoupling caps could be closer to the chips, but it's always
worked for me.

More than likely your problem has to do with violating some timing
requirement of the DRAM controller or the DRAMs themselves.
--
Rainer M. Malzbender                          Technology recapitulates biology.
Dept. of Physics                (303)492-6829       rainer@hibachi.colorado.edu 
U. of Colorado, Boulder, USA                  malzbender%opus@vaxf.colorado.edu