Article View: sci.electronics
Article #6456Re: Minimum speed on processors
From: Massoud Ajami
Date: Thu, 27 Aug 1992 20:17
Date: Thu, 27 Aug 1992 20:17
46 lines
2261 bytes
2261 bytes
In article <1992Aug27.135703.26001@zip.eecs.umich.edu> johnwitt@cdrom.engin.umich.edu (John P Wittkoski ) writes: >For a 33MHz 68030, there is a minimum clock speed listed for it in >the databooks. I think it's somewhere around 25Mhz for a 33MHz version, but I >don't have my databook handy. >My question is: why is there a minimum? >One possibility I have heard is that the on-chip registers and/or cache >are dynamic in nature, and since the chip is geared for 33MHz, it divides >this down to whatever rate is needed for the refresh circuitry. Therefore, >if you go below the minimum, the refresh rate slows to below the minimum >needed for the refresh. >Now, is there someone out there who knows about this? I'm interested >specifically in the 68xxx CPUs, but any general info would be helpful. >For example: >1. Is the guess I made above accurate, or is there some other reason? >2. If the reason above is correct, does it apply to the registers, the > cache, or both (or neither?) >3. If it's just a testing parameter, how far could I crank the clock speed > down? 20Mhz? 16,8,2,1??? >Just curious. >Reply by newsgroup or email, whichever is easiest for you. > --John Wittkoski > University of Michigan > johnwitt@engin.umich.edu Yes, all registers (memory locations) on the processor are dynamic, and they get refreshed by cycle stealing mode (transparent to the system). 1- Your guess is correct. 2- It apply to all memory locations. Notice that static RAMs consume a lot of real estate. 3- It is not testing parameter, but you can change the frequency down until the system crashes; That is the minimum. Peace and Prosperity! ---==< 110 >==---
Technical Details
Message-ID:
<massoud.61@chemteca.sdsu.edu>Path:
arc1-ca.pugleaf.net!sparky!uunet!cis.ohio-state.edu!pacific.mps.ohio-state.edu!linac!uwm.edu!bionet!ucselx!newshub.sdsu.edu!chemteca.sdsu.edu!massoudReferences:
<1992Aug27.135703.26001@zip.eecs.umich.edu>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!sparky!uunet!cis.ohio-state.edu!pacific.mps.ohio-state.edu!linac!uwm.edu!bionet!ucselx!newshub.sdsu.edu!chemteca.sdsu.edu!massoud From: massoud@chemteca.sdsu.edu (Massoud Ajami) Newsgroups: sci.electronics Subject: Re: Minimum speed on processors Message-ID: <massoud.61@chemteca.sdsu.edu> Date: 27 Aug 92 20:17:12 GMT References: <1992Aug27.135703.26001@zip.eecs.umich.edu> Sender: news@newshub.sdsu.edu Organization: San Diego State University Lines: 46 Nntp-Posting-Host: 130.191.227.22