🚀 go-pugleaf

jimc@tau-ceti.isc-br.com (Jim Cathey) writes:

>In article <1992Aug14.114202.3925@donau.et.tudelft.nl> knop@dutecag.et.tudelft.nl (Peter Knoppers) writes:
>>If it is not possible to ensure that the input signal is low at the
>>end of the 1 second period, you'll have to add some logic that switches
>>off the trigger signal of the 555 after it has been started until the
>>logic input signal has gone low again.

>Or, you could capacitively couple the trigger signal.  Saves some gates,
>if you don't get them for free.

That may create a signal that rises above the VCC level or drops below the
GND level. Such a signal may trigger a parasitic thyristor in the chip that
short-circuits the power supply pins and subsequently destroys the chip,
the power supply, or both.

The signals on input pins of most digital chips may NEVER exceed the range
of the power pins (GND to VCC) by more than about 0.5 Volts. Permanent
damage may occur if this rule is violated.

Peter Knoppers - knop@duteca.et.tudelft.nl