🚀 go-pugleaf

In article <53744@unix.cis.pitt.edu>, fmgst@unix.cis.pitt.edu (Filip Gieszczykiewicz) writes:
> 
> 	I am interested in a design that uses either the AY-3-1015D or
> is made using LSI and SSI chips. I have _many_ 1015D's! Could someone
> mail me at least a pinout or a data sheet? Thank you.
> 
> 	Take care. (Please use e-mail and I'll post the results)

Well, someone else wanted it too, so here it is.

Strange tricks are needed somewhere here.  I think that you need to feed 
an Inverted Data available into the Reset Data Available if you want a 
standalone unit, and that can be fed into the Data Strobe.
(been at least 12 years since I played with one of these)

markz@ssc.uucp


Paraphrased a bit from the 1977 General Instrument Databook
AY-5-1013A P mos
AY-6-1013  P mos	
AY-3-1014A High Voltage N Mos
AY-3-1015  N mos
(All except 3-1014A have internal pullups on input pins)

1   p   VCC +5 V  (5 to 14 volts for the AY-3-1014A)
2   p   VGG -12V (needed for AY-5-1013A, AY-6-1016, not needed for AY-3-101[45])
3   p   Ground
4   i   Received Data Enable (Active Low)  Output Enable for pins 5 to 12
5   o   Received Data 8 (Most Significant bit)
6   o   RD7
7   o   RD6
8   o   RD5
9   o   RD4
10  o   RD3
11  o   RD2
12  o   Received Data 1 (Least Significant bit)
13  o   Parity Error (Active High)
14  o   Framing Error (Active High)
15  o   Overrun (received character overwritten) (Active High)
16  o   Status Word Enable (Active Low)  output enable for pins 13,14,15,19 and 	22) Parity, Framing, Overrun, Data Available, Transmit Buffer Empty
17  i   Receiver Clock (16 times baud rate) 
        Max 16 * (20, 30, 40) Khz depending on version
18  i   Reset Data Available latch (Active Low)
19  o   Data Available (Active High)
20  i   Serial Input - Mark at logic 1, Space at logic 0
21  i   External Reset (Active High)
22  o   Transmit Buffer Empty (Active High)
23  i   Data Strobe (transmit)(Active Low)
24  o   End of Character logic 1 between the end of last character and
        start of next 
25  o   Serial Output
26  i   Data Bit Input 1
27  i   DB2
28  i   DB3
29  i   DB4
30  i   DB5
31  i   DB6
32  i   DB7
33  i   DB8
34  i   Control Strobe (pulse or Active high) set internal state from
        pins 35-39
35  i   No Parity,  logic 0 = Send Parity Bit, logic 1 = No Parity bit
36  i   Number of Stop Bits Logic 0 = 1 Stop Bit, logic 1 = 2 Stop bits
        Some version send 1.5 Stop bits if character is 5 bits long
37  i   NB2      NB2  NB1 logic levels
38  i   NB1       0    0     5 Bit characters
                  0    1     6 Bit characters
        	  1    0     7 Bit characters
        	  1    1     8 Bit characters
39  i   Odd/Even Parity Logic 0 = odd, logic 1 = even
40  i   Transmitter Clock  (16 * baud Rate)