🚀 go-pugleaf

In response to the question about crystal load capacitance - 

                           | ---- | crystal
                +----------| |  | |----------+
                |          | ---- |          |
                |                            |
                |           |\   inverter    |
                |           |  \             |
                +-----------|   >()----------+----------[]   output
                |           |  /             |
                |           |/               |
              -----                        -----
              -----  CL1                   ----- CL2
                |                            |
                |                            |
                +-------------+--------------+
                              |
                            -----
                             ---
                              -

Given the above "typical" crystal oscillator, the values of CL1 and CL2
can be determined with a reasonable amount of precision.  Before going 
into the procedure, let's lay down just a little ground work.

In any oscillator, two criteria must be met (the Barkhausen Criteria) :

     1) loop gain must be at least equal to 1.00; and 

     2) phase shift around the loop must be an integer 
        multiple of 360 degrees.

These criteria must both be met at the frequency of interest.  Now, 
looking back at the circuit, we have an inverting amplifier and 
a feedback network.  The feedback network is therefore a crystal 
in parallel with a series-capacitor pair (neglect the ground point
for this analysis; it can be shown that there is a circulating current
in the feedback network that does not "see" the ground.)  Since our
oscillator must have 360 degrees (or an integer multiple thereof), and
the inverter provides 180 degrees, the feedback network must provide the
other 180 degrees.

For the feedback network to introduce a 180 degree phase shift, it must
have the form of an L-C tank (given the above configuration), and
we immediately see that the crystal takes the place of the "L" in the
tank.

With all that said, it is a fairly simple job to determine the values of
the load capacitors CL1 and CL2.  That is to say, the mathematics are
quite straightforward, but there are practical problems with this 
circuit.  Don't get me wrong, though; it's a good circuit - we just
have to handle a few of "gotcha's".

First of all, the inverter has a small value of capacitance associated
with its input.  For common logic families, this is typically in the
range of 4-8 pF, so we must add this to CL1 (since it is actually in
parallel with CL1).  We will use a value of 6 pF for this purpose.

Our output is used to drive some other circuitry, so we must
also accommodate the capacitance associated with the inputs of the
driven circuit.  Usually we will choose to use another inverter to
"buffer" the oscillator circuit; this way, the actual oscillator stage
only has to drive a small, known load.  The added capacitance is also
about 6 pF, and we see that we must add it to CL2.

There is also some stray capacitance associated with the wiring and/or
printed circuit board traces, and this is usually only a few pF.  
Although this stray capacitance is distributed over the entire circuit,
we usually treat it as if it were lumped into a 2-4 pF capacitance
connected directly across the crystal.  

Finally, there is a capacitance associated with the output of the
inverter, and this capacitance is a major source of frustration for the
uninitiated.  There are two "parts" to this capacitance; one is a
physical capacitance due to the separation of conductors in the
inverter's output stage and in the packaging, and the other is an
effective capacitance which is due to the finite time required to
propagate the signal through the inverter.  The first capacitance is
typically about 5 pF, and the latter, though highly frequency dependent,
is generally taken to be in the range of 5-30 pF, with 15 pF a good
compromise.  These capacitances must be added to CL2.

Now we can get down to determining the values of CL1 and CL2.  One last
caveat though - it has been empirically determined that excessively
large or small values of capacitance can cause problems.  I am not 
going to get into these problems here because they are too dependent on
the technology (TTL, CMOS, NMOS, etc.), inverter configuration (compensated,
de-compensated, Schmitt Trigger, etc.), and frequency.  For most cases,
however, we will be safe if we select values of CL1 and CL2 in the range
of 10-40 pF.

The most common scenario involves designing an oscillator given the
crystal manufacturer's specified load capacitance, which we now know
(from the discussion above) to be approximately given as


                                   1
  CL = 3 pF +  -------------------------------------------------
                      1                        1
                 ------------  +   ---------------------------
                  CL1 + 6 pF        CL2 + 6 pF + 5 pF + 15 pF


We will commonly choose to make CL1 = CL2 (or CL1 a trimmer capacitor
whose mid-range value is equal to CL2), so that given CL, it is fairly
easy to calculate values for CL1 and CL2.

For example, let's calculate CL1 and CL2 for a crystal whose load
capacitance is specified as 18 pF :


                     1
  18 = 3 + ----------------------
               1           1
            -------  +  -------- 
             C + 6       C + 26

Solving this gives C = 17 pF.  This is not a standard value, so 18 pF could
be used for non-critical applications.  If extreme accuracy is necessary, 
CL2 could be 15 pF and CL1 variable from about 10 to 50 pF, although actual
values are much more likely to be determined after the basic circuit has 
been laid out on a printed circuit board (so that stray capacitances and
other variables are made less variable.)  In any event, the final values
should match the calculated values within 10% to 20%.  As is usually the
case with high frequency analog circuitry, analysis is far more precise 
than is synthesis.

I hope this has helped to de-mystify crystal oscillator operation.  To be
sure, this is a mere overview, but it addresses the major hurdles usually
encountered in crystal oscillator design.

One final note - the circuit and description above are for AT-cut crystals
operating in parallel resonance and at their fundamental frequencies.  
While this may seem like a serious restriction on the utility of the above
discussion, virtually all microprocessor crystals fall into this category.
--
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**   Jeff  Verive  |  If they ever stop making those little candy flowers **
**   259371048378  |  for birthday cakes, I shall lose my will to live.   **
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