Article View: sci.electronics
Article #9266DRAM INTERFACE CONTROLLER
From: Steven Howell
Date: Fri, 04 Jan 1991 04:44
Date: Fri, 04 Jan 1991 04:44
16 lines
1117 bytes
1117 bytes
Hi, I am about to employ a system for storing information electronically in one of our graphic systems. I intend on using 8x1Mb Simm modules, however the technique of controlling CAS and RAS is not familiar to me yet, and I wish to use a Hybrid controller to do the timming for me I have look up a couple of IC's that will do the job, but are $100 or so dollars, making it uneconomical (The chip is a 74S409). Does anyone have experience with this type of memory control, and would be happy to give me some suggestions on how I can interface 4Mbx8 to a 65c02 in a 4 bank configuration (The 6502 has only 11 available address lines for accessing memory, which means it can access only 1Mb of dynamic memory) Thanks in advance. Steve h
Technical Details
Message-ID:
<steveh.662964261@tasman>Path:
arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!munnari.oz.au!diemen!tasman!stevehShow Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!munnari.oz.au!diemen!tasman!steveh From: steveh@tasman.cc.utas.edu.au (Steven Howell) Newsgroups: sci.electronics Subject: DRAM INTERFACE CONTROLLER Message-ID: <steveh.662964261@tasman> Date: 4 Jan 91 04:44:21 GMT Sender: news@diemen.utas.edu.au Distribution: sci Lines: 16