Article View: sci.electronics
Article #9947Analog signal elay element: Question
From: Shih-Lien Lu
Date: Wed, 06 Feb 1991 19:01
Date: Wed, 06 Feb 1991 19:01
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700 bytes
700 bytes
Wisdom of the net: What are some ways to implement delays for analog signals (dealy in 1 ns resolution)? One possible way is to have the equiv. of an R/2R ladder. Is there any other way, in particular, to implement on an IC? Thanks in advance. Shih-Lien
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arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!zaphod.mps.ohio-state.edu!usc!isi.edu!jenny.isi.edu!slluShow Full Headers
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!zaphod.mps.ohio-state.edu!usc!isi.edu!jenny.isi.edu!sllu From: sllu@jenny.isi.edu (Shih-Lien Lu) Newsgroups: sci.electronics Subject: Analog signal elay element: Question Message-ID: <16663@venera.isi.edu> Date: 6 Feb 91 19:01:54 GMT Sender: news@isi.edu Reply-To: sllu@ISI.EDU (Shih-Lien Lu) Organization: USC-Information Sciences Institute Lines: 9