Article View: sci.electronics
Article #17939Re: TTL Questions
From: Rob Warnock
Date: Sat, 22 Aug 1987 04:17
Date: Sat, 22 Aug 1987 04:17
34 lines
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2249 bytes
In article <20036@ucbvax.BERKELEY.EDU>, after pointing out quite
correctly that in 7400-series (not 74LS') one must *NOT* tie inputs
to the +5 rail, Max Hauser writes:
+---------------
| I should add that one never, of course, uses a resistor in series
| with inputs tied to ground, for current-sinking logic such as TTL
| families (of all kinds), since the major input current flows in the
| "low" state, causing a voltage drop that can cloud the logic "0";
| and reverse junction breakdown is not an issue in that case.
+---------------
Well... there are times when a resistor to ground makes sense, too.
Notice that any resistor value less than "V_max_0/(I_max_0 * #of_inputs)"
will be fine, as it's no worse than a true gate output would be. For a
7400 TTL single "standard load" input, that's 0.4/.016 = 25 ohms or less.
I once worked with a "producability engineer" who insisted that we *NOT* tie
inputs directly to ground (or to +5) for such things as bus-driver enables
which were "always" on. His reason? When using "bed-of-nails" testers to
diagnose a failing board, by driving that resistor to logic high briefly
he could isolate the bus driver from the bus. "Briefly", because we typically
used 10 ohm 1/10-watt resistors for "pulldowns" (used a lot of Schottky),
and they could only take a brief time at +3.5 volts! ("E-square over R"
gives 1.225 WATT!) But a few microseconds was all the tester needed...
Rob Warnock
Systems Architecture Consultant
UUCP: {amdcad,fortune,sun,attmail}!redwood!rpw3
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Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: arc1-ca.pugleaf.net!utzoo!mnetor!uunet!seismo!columbia!rutgers!ames!amdahl!amdcad!rpw3 From: rpw3@amdcad.AMD.COM (Rob Warnock) Newsgroups: sci.electronics Subject: Re: TTL Questions Message-ID: <18007@amdcad.AMD.COM> Date: Sat, 22-Aug-87 00:17:47 EDT Article-I.D.: amdcad.18007 Posted: Sat Aug 22 00:17:47 1987 Date-Received: Sun, 23-Aug-87 08:21:06 EDT References: <7105@alice.UUCP> <764@sol.ARPA> <128@umich.UUCP> <20036@ucbvax.BERKELEY.EDU> Reply-To: rpw3@amdcad.UUCP (Rob Warnock) Organization: [Consultant] San Mateo, CA Lines: 34 Keywords: TTL, pullups