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Article #8522

pc board design tips

#8522
From: Mark Robert Thorson
Date: Sat, 24 Nov 1990 00:00
55 lines
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Mark Thorson's pc design tips:
1.  serialize critical signals, like clocks (i.e. a 
single line begins at an output and visits each input 
driven by that output, without any forks in the layout)
2.  high-current signals, like RAS and CAS, should be 
run at a 90 angle to everything else to minimize 
inductive coupling
3.  corners should be rounded or angled with no 90 
bends, except for DC signals and power;  corners cause 
reflections
4.  no loops or circles in the layout;  they act like 
antennas
5.  a decoupling capacitor for every chip;  Rogers 
under-the-chip capacitors are good, except with chips 
that run hot (and don't forget to insert them before 
stuffing the board with chips!)
6.  locate the clock drivers in the same package, to 
minimize skew
7.  don't run other signals through the package which 
buffers the clocks, RAS, CAS, etc., to minimize effects 
of cross-coupling through the power rails
8.  series termination:  100 ohms located near driver 
(in my experience looking at the effects of termination 
on a scope, it seems mostly important whether 
termination is there or not, rather than the exact value 
which is used)
9.  parallel termination:  220 ohms to Vcc, 330 ohms to 
GND at far end from driver
10.  on slow-speed boards, block out as much copper as 
possible, to minimize wear on the etchant (this might 
not be a consideration, depending on the pricing policy 
of your pc shop)
11.  at the same time, large areas of copper should be 
interrupted by space, to prevent formation of a solder 
drop when soldering
12.  isolate strong sources of noise or circuits highly 
sensitive to noise with a moat on the power layers;  
i.e. the power for that section would be provided along 
one edge or in one corner, with lots of decoupling
13.  when checking clearances around chips, allow for 
emulation probes, DIP clips, insertion/extraction tools, 
heatsinks, and cards inserted in edge connectors
14.  always put a few blank DIP patterns in areas where 
more chips are likely to be needed (e.g. clock buffers, 
bus interface PLD's, etc.)
15.  to minimize gold, remove the edge connector fingers 
from unused positions
16.  when using chips that have on-chip oscillators with 
external crystals, keep the crystal close to the chip
17.  orient chips with their long axis perpendicular to 
the flow of air
18.  don't let the production people clear shorts in 
multilayer pc's by using a high-current pulse;  this 
common technique causes unreliability by damaging 
conductors on either side of the short
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From: mmm@cup.portal.com (Mark Robert Thorson)
Newsgroups: sci.electronics
Subject: pc board design tips
Message-ID: <36183@cup.portal.com>
Date: 24 Nov 90 00:00:14 GMT
Organization: The Portal System (TM)
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