Thread View: sci.engr.semiconductors
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Started by course
Thu, 07 Sep 1995 00:00
Berkeley CVD & ESD courses in Sept/Oct
Author: course
Date: Thu, 07 Sep 1995 00:00
Date: Thu, 07 Sep 1995 00:00
88 lines
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4135 bytes
The University of California, Berkeley, announces two
intensive short courses in San Francisco/Burlingame:
I. "CHEMICAL VAPOR DEPOSITION (CVD) FOR SILICON
INTEGRATED CIRCUITS",
September 11-13, 1995 at the San Francisco Airport,
Burlingame, California
This course is intended to give you a fundamental,
practical understanding of CVD as it applies to
IC fabrication. It also serves as an update for
process Engineers with a background in CVD.
Topics covered: Fundamentals of CVD; Mathematical Modeling
of CVD Processes; Thermal CVD---Epitaxial Silicon and
Polysilicon Films; Thermal CVD---Polysilicon and Dielectric
Films; Thermal CVD---Conducting Films; Thermal CVD---
Selective Deposition of Conducting Films, Barrier
Films; Plasma-Enhanced CVD; CVD Reactors---Atmospheric
and Low Pressure Systems; CVD Reactors---Single-Wafer and
Multichamber Systems.
INSTRUCTORS:
Dennis W. Hess, Ph.D., Professor and Chairman of the Chemical
Engineering Dept., Lehigh University, Bethlehem, PA
Ted Kamins, Ph.D., Project Leader at Hewlett-Packard, Palo
Alto, CA
Arthur Sherman, Ph.D., Consultant in CVD, Palo Alto, CA
FEE: $995
-----------------------------------------------------------
II. "ELECTROSTATIC DISCHARGE (ESD)
IN INTEGRATED CIRCUITS"
October 9-10, 1995, at the San Francisco Airport,
Burlingame, California
This course is for circuit designers, process development
engineers and product/reliability engineers. While most
protection techniques presented emphasize CMOS technology,
the material is applicable to engineers working on other
technologies.
Topics covered: ESD in ICs; Testing for ESD; Basics of
ESD Protection; Failure Modes and Characterization;
CMOS ESD Input Protection; Transmission Line Pulsing;
Wafer Level Monitor; Device Physics; CMOS Output Protection;
Process Effects; Internal Protection; CDM Phenomena
and Protection; Bipolar/BiCMOS Protection; Failure Analysis
Tools; Device and Circuit Simulations; Electrical Overstress;
Case Studies.
INSTRUCTORS:
Ajith Amerasekera, Ph.D., Senior Member of Technical Staff,
Texas Instruments, Dallas, TX
Charvaka Duvvury (course organizer), Ph.D., Senior Member
of the Technical Staff, Texas Instruments, Dallas, TX
Gadi Krieger, Ph.D., President of QualiTau, Inc., Sunnyvale,
CA
Timothy J. Maloney, Ph.D., Senior Staff Engineer, Intel
Corporation, Santa Clara
Tom Polgreen, Ph.D., Staff Modeling Engineer, Dallas
Semiconductor, Dallas, TX.
UC Berkeley Faculty Advisor: Chenming Hu, Professor
of Electrical Engineering and Computer Sciences, UC Berkeley
--------------------------------------------------------
FURTHER INFORMATION:
Reply with your POSTAL ADDRESS and we will send you
a descriptive brochure.
In your message, please mention "CVD/ESD courses".
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