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Article #3801

Shuttle Computer Problems

#3801
From: waterman
Date: Tue, 24 Nov 1992 03:38
32 lines
2080 bytes
Monday November 23 10:20 EST

I'm looking for some help out here in the net. Any physists or experts
in electron physics out there?
   The problem we're having is with both the General Purpose Computers
(GPCs) onboard the shuttle as well as the Main Engine Controllers (SSMEC).
Both experience single bit upsets while in orbit. The GPCs have one bit
error correction and log these upsets in what we call a soft error counter.
For the SSMEC, it has no error correction. We dump the SSMEC memory after
landing and determine how many upsets have occurred. Well today when the
SSMECs were powered up on Discoveries three Main Engines, the standby
computer on engine 3 had one bit flipped from the last time it was powered
up (about a week ago). The GPCs have also experienced soft errors while at
the pad. The current theory is that high energy particles striking the 
memory cell impart energy which changes the state. My question is if
high energy particles can change the memory on the shuttle sitting on the
pad. Why aren't all the other computers in the world inflicted with the
same problem? Has anyone heard any studies being done on this?

Some info, the SSMEC uses 8K static RAM chips to make up the 64K by 16 bit
main memory. When power is removed the memory is held up by a 3.56V
battery. Todate it is believed that all bit flips have occurred at this
lower battery voltage (power up voltage is 5V). This of course can not
be proved (could have happened at full power in memory that was not being
accessed).

Thanks.

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Bob Waterman [Aqua]
waterman@titan.ksc.nasa.gov
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Path: arc1-ca.pugleaf.net!sparky!uunet!usc!cs.utexas.edu!sun-barr!ames!titan.ksc.nasa.gov!waterman
From: waterman@titan.ksc.nasa.gov
Newsgroups: sci.space.shuttle
Subject: Shuttle Computer Problems
Message-ID: <1992Nov23.223811.4292@titan.ksc.nasa.gov>
Date: 23 Nov 92 22:38:11 EST
Organization: NASA, Kennedy Space Center
Lines: 34