🚀 go-pugleaf

This position is in the Technology Development Group of
Sun Microsystems, Inc. The Technology Development group
is investigating new technologies for future products.

TO04-VLSI DESIGN ENGINEER-Will work on a directory based
cache controller, which is part of a distributed shared
memory multiprocessor.

Candidate must have 5-10 years of experience doing system
architecture and VLSI design, resulting in sucessful 
first pass silicon. Experience with chip level and system
level simulation, logic synthesis and timing analysis is
required together with an understanding of ASIC design 
issues such as: clock distribution, macrocell based logic
design, timing characterization and testability, especially
scan based methodologies. Knowledge of cache controller,
DRAM/CDRAM memory controller to sparc mbus interface logic
is desired. Also desired is experience with Verilog
simulation, Synopsis synthesis and static timing analysis
tools. BS/MS EE or equivalent.

For more information or consideration please contact:
Scott Simmons at
C/O Sun Microsystems, Inc.
2550 Garcia Ave.
Mountain View, CA 94043-1100
Mailstop: MTV 10-306
FAX # 415-336-6606