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Article #5UNC-CH: CS Colloquium - Forrest Norrod, Hewlett-Packard
From: Donna Boggs
Date: Mon, 02 Nov 1992 21:45
Date: Mon, 02 Nov 1992 21:45
60 lines
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3176 bytes
The University of North Carolina at Chapel Hill Department of Computer Science COLLOQUIUM Forrest Norrod User Interface Technology Division Hewlett-Packard Friday, November 6, 1992 1:00 p.m. 011 Classroom, Sitterson Hall Hardware Perspective Interpolation & Technology Trends in 3D Hardware 3D graphics users demand ever-increasing image quality and performance from their systems. Workstation vendors address these needs by devoting specialized hardware to the various stages of the graphics pipeline. The amount and nature of hardware provided for each stage of the 3D pipeline depends on cost and performance goals, but also upon technology trends that drive a cycle long described as the 'wheel of reincarnation.' The rasterization stage of the graphics pipeline (wherein pixel color, texture, and depth values for transformed and lit graphics primitives are generated) is particularly amenable to dedicated hardware. Here the two demands of image quality and rendering speed are in sharp conflict with each other and the omnipresent need to reduce hardware costs. The traditional approach to rasterization emphasizes speed and low-cost over image quality by using linear interpolation to produce pixel colors and other parameters. Linear interpolation of pixel parameters can result in serious visual artifacts, especially when computing texture values. Unfortunately, the 'correct' interpolation algorithm, perspective-correct interpolation, is computationally expensive and has been difficult to implement in affordable hardware. Recent graphics systems from Hewlett-Packard and Silicon Graphics overcome these difficulties with advanced VLSI chip-sets that provide high-speed perspective-correct rasterization. Forrest Norrod from Hewlett-Packard will discuss the architecture and algorithms of HP's CTI (Color and Texture Interpolator) and ZI (Z Interpolator) perspective-correct rasterization chips. The chip set's rasterization algorithms and the practical problems encountered in rasterizer design will be detailled. Rasterization hardware is almost always a feature of any graphics workstation, but few other stages of the 3D pipeline are universally implemented in specialized hardware. The amount of hardware used in a graphics system is driven by performance and cost goals, but also by available technology. Forrest Norrod will outline recent advances in VLSI technology and how they are impacting the architecture of future 3D hardware. Biographical Sketch Forrest Norrod is a member of the technical staff of Hewlett-Packard's User Interface Technology Division and chief architect for HP's 3D graphics hardware. He was one of the designers of the CTI and ZI rasterizer chip set and architect of the CRX24Z 3D accelerator. HOST: Professor Turner Whitted, 962-1919, email jtw@cs.unc.
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Path: arc1-ca.pugleaf.net!sparky!uunet!concert!borg!hatteras!boggs From: boggs@hatteras.cs.unc.edu (Donna Boggs) Newsgroups: triangle.talks Subject: UNC-CH: CS Colloquium - Forrest Norrod, Hewlett-Packard Message-ID: <17098@borg.cs.unc.edu> Date: 2 Nov 92 21:45:13 GMT Sender: news@cs.unc.edu Lines: 61