🚀 go-pugleaf

In article <8110b9$72u1@gamma.dmz-eu.st.com>, Dave Smith
<dsmith@bristol.nospam.st.com> writes
>In article <DrqGVLArivM4EwLX@provocative.freeserve.co.uk>, Gav 
><Gavin@NOSPAM.co.uk> writes:
>|> You don't appear to have taken anything other than higher clock speed =
>|> higher power dissipation into account. There are a few other reasons a
>|> device has a clock limit, parasitic capacitance for example...
>
>On the contrary, I have taken other things into account.  It is true that higher
>clock speed = higher power dissipation, but higher temperature = higher
>resistance.  As I said in the other post, the delay is a function of resistance
>and capacitance, so if you reduce the resistance, you reduce the delay.
>
>Otherwise, why is it that our SPICE transistor models run faster when they are 
>in colder operating conditions?
>
>If you can get the _die_ of a chip cooler, it will run faster.  This is one of 
>the functions of extra cooling in overclocked systems.  A chip with a die at 10C
>can run faster than a chip with a die at 40C.  Both temperatures are within 
>the safe limits of most chips, so neither is overheating, but the first will 
>have
>intrinsically faster transistors because of the lower temperature.
>
Ah, you're clearly better educated in this subject than I am. I do have
a little background in this area (degree microelectronics, Brunel) but
it's been a couple of years or so now.

I read your post as saying temperature is the only factor affecting
whether a device will overclock. I was thinking back to when we messed
with HSPICE and overclocked a simple synchronous counter, watching as a
screen of nice clean (nearly) square waves degenerated into mere wobbly
lines as the clock rate was upped. The speeds the latest generation of
processors run at never cease to amaze me.
-- 
|Gav|

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gavin@provocative.freeserve.co.uk