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Article #198cider seminar on Simulated Annealing VLSI Placement on an MIMD Multiprocessor
From: Ted Szymanski
Date: Tue, 28 Jan 1986 17:10
Date: Tue, 28 Jan 1986 17:10
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1725 bytes
Fast, High Quality VLSI Placement
on an MIMD Multiprocessor
By Jonathan Rose
Room GB 221
Time: 12:05
Date: Friday, Jan. 31st, 1986
Abstract
High quality automatic VLSI layout, especially placement, has
been notoriously difficult to achieve. Recent advances in layout
algorithms, notably Simulated Annealing, have attained signifi-
cant improvements in quality but at the cost of an enormous
amount of computing time. This seminar discusses recent work to-
wards obtaining the same quality as Simulated Annealing but in a
shorter time using a Multiple Instruction stream - Multiple Data
stream (MIMD) multiprocessor.
The objectives of this machine will be discussed and a quick re-
view of Simulated Annealing will be given. Some experiences with
the algorithm and a characterization of its search space will be
presented. Several approaches to parallel Simulated Annealing
will be described, and the results obtained to date will be
given.
Technical Details
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Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10 beta 3/9/83; site utecfa.UUCP Path: arc1-ca.pugleaf.net!utzoo!utcsri!utai!uthub!utecfa!szymans From: szymans@utecfa.UUCP (Ted Szymanski) Newsgroups: ut.general Subject: cider seminar on Simulated Annealing VLSI Placement on an MIMD Multiprocessor Message-ID: <1780@utecfa.UUCP> Date: Tue, 28-Jan-86 12:10:18 EST Article-I.D.: utecfa.1780 Posted: Tue Jan 28 12:10:18 1986 Date-Received: Tue, 28-Jan-86 15:27:52 EST Organization: Engineering Computing Facility, University of Toronto Lines: 22