Seminar on Computer Architecture and VLSI Tools at Stanford

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1 total messages Started by Jonathan Rose SF2202 5036 Tue, 05 Jun 1984 20:16

#10

Author: Jonathan Rose SF2202 5036
Date: Tue, 05 Jun 1984 20:16

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 	        Cider Seminar Series

                      Part CXL

               What's Up at Stanford

                    By Paul Chow

                    Room GB 244

                    Time: 12:05

             Date: Friday June 8, 1984

                      Abstract

   This will be a very  informal  description  of
   various  happenings  and impressions of what's
   happening at Stanford University in  the  area
   of  computer  architecture,  VLSI and whatever
   else you might care to  ask  about.   A  brief
   description  of the next MIPS processor (MIPS-
   X) will also be given.  The goal is to make it
   go  5-10  times  faster  than MIPS which means
   that it will bump into CRAY-1 speeds for "sym-
   bolic  type  problems" (non vector).  The pro-
   ject is just starting.

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