Thread View: aus.computers.parallel
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Started by markm
Tue, 03 Dec 1996 00:00
netseminar ad
Author: markm
Date: Tue, 03 Dec 1996 00:00
Date: Tue, 03 Dec 1996 00:00
21 lines
1118 bytes
1118 bytes
Digital Signal Processing with Xilinx FPGAs Tuesday, December 10, 1996 10:00am - 11:00am Agenda: Distributed Arithmetic SDA FIR Filter Example 8-Tap Slice Building Block High-Speed PDA FIR Filter Decimation FIR Filter Biography Bruce Newgard is a Sr. DSP FAE for Xilinx Corp. (San Jose, CA), where he specializes in FPGA-based DSP applications. He holds a BSEE from the University of Texas at Arlington (Arlington, TX). When he is not developing FPGA-DSP solutions, he enjoys flying, high-performance cars, building airplanes, and spending time with his wife Connie and daughter Katie. Interested Attendees may register at: http://www.netseminar.com
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