board level engineer (san mateo, ca.)

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From: jack allen
Date: Mon, 28 Oct 1996 00:00

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This opportunity entails digital design, signal timing analysis,
schematic entry, signal integrity analysis/simulation, board bring-up
in the lab and transfer of boards to manufacturing. Requires a BSEE/CS
or equivalent with 3+ years directly related experience. MSEE/CS or
related field preferred. Must have experience and fast bus interfaces
and high speed digital logic board design. Expertise with SPICE and
Motive or equivalent tool is helpful. Must also have experience with
FPGA, Verilog and an understanding of ASIC packaging and PCI Bus
architecture.
Please respond by fax or email to:
Connexion:
fax: 415-326-4501
email: eci@ix.netcom.com
attn: jack allen
ref: e-56

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From: eci@ix.netcom.com (jack allen)
Subject: board level engineer (san mateo, ca.)
Date: 1996/10/28
Message-ID: <3274f5f0.8204223@nntp.ix.netcom.com>
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organization: connexion
x-netcom-date: Mon Oct 28 10:10:25 AM PST 1996
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