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Article #10354

Re: Bitfield and loop instructions--a good idea?

#10354
From: Tim Olson
Date: Fri, 19 Apr 1991 22:49
34 lines
1665 bytes
In article <6444@acorn.co.uk> john@acorn.co.uk (John Bowler) writes:
| 	src = prev >> shift;
| 	prev = *srcptr++;
| 	src |= prev << (BPW-shift);
| 
| (BPW = Bits Per Word).
| 
| Given that (BPW-shift) is ammenable to CSE by the compiler this is about
| four instructions (well, it's three instructions on the ARM; for those who
| understand the ARM assembler:-
| 
| 	MOV	src, prev, LSR shift
| 	LDR	prev, [srcptr], #4
| 	ORR	src, src, prev, LSL BPWshift
| )
| 
| The only way in which I can see a general bit extract helping is
| if an instruction of the form:-
| 
| 	extract 32 bits from this register *PAIR*
| 
| exists; then the above can be reduced to two instructions.  Is this
| really worth it?

Sometimes it is.  That is exactly what the extract instruction on the
Am29000 processor does -- extract a 32-bit word from the concatenation
of two register values, starting at any bit.  It is useful for
BITBLTs, as well as performing arbitrary byte-aligned memory transfers
at an aligned word transfer rate.

--
	-- Tim Olson
	Advanced Micro Devices
	(tim@amd.com)
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Message-ID: <1991Apr19.224952.12297@dvorak.amd.com>
Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!mips!pacbell.com!decwrl!sun-barr!newstop!sun!amdcad!dvorak.amd.com!nucleus!tim
References: <2302@spim.mips.COM> <MEISSNER.91Apr16125239@curley.osf.org> <6444@acorn.co.uk>

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From: tim@nucleus.amd.com (Tim Olson)
Newsgroups: comp.arch
Subject: Re: Bitfield and loop instructions--a good idea?
Message-ID: <1991Apr19.224952.12297@dvorak.amd.com>
Date: 19 Apr 91 22:49:52 GMT
References: <2302@spim.mips.COM> <MEISSNER.91Apr16125239@curley.osf.org> <6444@acorn.co.uk>
Sender: usenet@dvorak.amd.com (Usenet News)
Organization: Advanced Micro Devices, Austin, TX
Lines: 34