🚀 go-pugleaf

In article <1e937lINNq50@gap.caltech.edu> rrm@ssdp.caltech.edu writes:
>So, I understand that IBM announced a clock-tripled (33MHz/99MHz) version
>of the 486 (a DX3?) at Comdex.  Can anyone in the know at IBM (or Intel)
>comment further on this?  IBM supposedly designed this chip under their
>existing licensing agreement with Intel.

The only 486 CPU that I know of that IBM announced is a 486SXL, which is
a clock dubled 486 in a 386SX pinout (for the portable market).  Even
with it's extra large cache it seems a tad bit silly to me (the clock).

>                                          If I understand that agreement
>properly, IBM has 6 months to exclusively do their thing with it before
>Intel can provide their own version to the masses.  Is that correct?

I don't know, but if it is it would give IBM a price advantage even after
the first 6months...  (on their PCs)

>Also, what kind of incremental/marginal gain is there to clock tripling?
>Does this chip have extra cache to compensate for the additional I/O burden?

I would assume they have at least as much cache as their 486SXL, but I
don't know.  Even if it has NO extra cache the tripled clock would help
a great deal on floating point ops.  How much more on-chip cache would
it need to signifagntly effect the integer speed (assuming most of the
int instructions are the one cycle kind...)?  And if IBM can make
a 486 run at 99Mhz what could they have done with a SPARC/MIPS/generic
RISC CPU?
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