Article View: comp.arch
Article #11218Re: ?Concurrent DMA possible on smarter PC buses (EISA/MCA/Localbus)
From: Thomas D. Barrett
Date: Sat, 19 Dec 1992 16:30
Date: Sat, 19 Dec 1992 16:30
18 lines
1439 bytes
1439 bytes
In article <1gul5nINN7ln@cbl.umd.edu> mike@cbl.umd.edu (Michael Santangelo) writes: > >So this theoretical EISA SCSI controller and this theoretical EISA FDDI >controller could both be doing DMA writes to main memory (interleaving their >accesses I assume)? Actually, they could "snarf" (to, eek!, borrow an intel term) each other's transfers to main memory I suppose. This concept of single transfers being snarfed-up was first seen by me in a Z80 design which used a series of POPs and PUSHs to perform a block move in half the time. -- | Tom Barrett (TDBear), Sr. Engineer | tom.barrett@amd.com | AMD PCD / Austin, TX 78741 | v:512-462-6856 / f:512-462-5155 | "No is yes, And we're all free" | CO made a #2 no-no... PU! | My views may not be shared by the organization of origin
Technical Details
Message-ID:
<1992Dec19.163012.25678@dvorak.amd.com>Path:
arc1-ca.pugleaf.net!sparky!uunet!cs.utexas.edu!sun-barr!news2me.EBay.Sun.COM!exodus.Eng.Sun.COM!sun!amdcad!dvorak.amd.com!tdbearReferences:
<1992Dec17.153141.3926@urbana.mcd.mot.com> <1992Dec17.191131.17701@twisto.eng.hou.compaq.com> <1gul5nINN7ln@cbl.umd.edu>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!sparky!uunet!cs.utexas.edu!sun-barr!news2me.EBay.Sun.COM!exodus.Eng.Sun.COM!sun!amdcad!dvorak.amd.com!tdbear From: tdbear@dvorak.amd.com (Thomas D. Barrett) Newsgroups: comp.arch,comp.arch.storage Subject: Re: ?Concurrent DMA possible on smarter PC buses (EISA/MCA/Localbus) Keywords: EISA,MCA,Localbus,VESA,PC,IBM,smartIO Message-ID: <1992Dec19.163012.25678@dvorak.amd.com> Date: 19 Dec 92 16:30:12 GMT References: <1992Dec17.153141.3926@urbana.mcd.mot.com> <1992Dec17.191131.17701@twisto.eng.hou.compaq.com> <1gul5nINN7ln@cbl.umd.edu> Organization: Advanced Micro Devices, Inc.; Austin, Texas Lines: 18