🚀 go-pugleaf

>>>>> On 19 Nov 1992 16:14:59 GMT, woodacre@mips.com (Michael Woodacre) said:

> PALcode allows for the implementation of uniprocessor-atomic
> "instructions" which are actually a sequence of Alpha instructions.
> It allows the architecture to remain pure RISC and not compromise
> performance to implement some complex instructions. This was very
> useful in the port of VMS to Alpha.

Michael> Can you explain how this is different from kernel code with interrupts
Michael> disabled on any other risc processor? For instance, an R4000 can
Michael> implement uniprocessor-atomic "instructions" which are sequences of
Michael> MIPS instructions to implement complex functions by running code
Michael> in kernel level with interrupts switched off.

It's not really all that different. My understanding of the point of PAL code
is that a collection of architecture implementation specific routines are
provided in ROM, reducing implementation specificities of the kernel. It may
also be the case that entering/exiting PAL code is a little faster than a
usual syscall (but gives a more restricted execution environment).
--

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