🚀 go-pugleaf

dipirro@star.dec.com (Steve DiPirro) writes:
] ... PALcode "instructions" actually appear as single instructions
]  in the Istream which is handy for debuggers, etc.  PALcode runs 
] with interrupts disabled, Istream memory management traps disabled,
]  and complete control over machine state. 

Sounds like a microcoded instruction to me. Except, of course, that
there's no guarantee of what PALcodes are available on a particular
system, and that the microcode may be external to the chip.

Humoursly : Sounds like an architectural wimp-out to me :-)

--
Dennis O'Connor			doconnor@sedona.intel.com