Re: RISC is NOT micro-code

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Article #1601

#1601

From: Stanley Chow
Date: Thu, 20 Jul 1989 14:11

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In article <23663@winchester.mips.COM> mash@mips.COM (John Mashey) writes:
>
>They evaluated 8 chips {80386, 32532, 68020, 68030, SPARC, 88000, 29000,
>R3000},  ....

Just a reminder that the three CISC's here are by no means representative
of CISC architecture. [Who cares about the actual number sold.]

Conclusions reached on a small sample of architecture cannot be generalized
to *all* CISC or RISC machines.

Stanley Chow        BitNet:  schow@BNR.CA
BNR		    UUCP:    ..!psuvax1!BNR.CA.bitnet!schow
(613) 763-2831		     ..!utgpu!bnr-vpa!bnr-fos!schow%bnr-public
Me? Represent other people? Don't make them laugh so hard.

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Path: arc1-ca.pugleaf.net!utzoo!bnr-vpa!bnr-fos!bnr-public!schow
From: schow@bnr-public.uucp (Stanley Chow)
Newsgroups: comp.arch
Subject: Re: RISC is NOT micro-code
Message-ID: <770@bnr-fos.UUCP>
Date: 20 Jul 89 14:11:03 GMT
References: <756@bnr-fos.UUCP> <2203@taux01.UUCP> <23663@winchester.mips.COM>
Sender: news@bnr-fos.UUCP
Reply-To: schow%BNR.CA.bitnet@relay.cs.net (Stanley Chow)
Organization: Bell-Northern Research, Ottawa, Canada
Lines: 15

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