🚀 go-pugleaf

In article <2203@taux01.UUCP> cjosta@tasu77.UUCP (Jonathan Sweedler) writes:
.....
>Correct me if I'm wrong, but I remember looking at some of the initial
>specs for the Intel 860 and that thing looked like a nightmare to write
>a compiler for.  Forget about optimizations, just getting floating
>point results out of the FP pipeline, requires that the compiler have
>knowledge of the internals of the hardware.  How many CISC chips do
>you know that make the same requirements?  (I'm probably going to be
>sorry I asked that :-)  But I think you know the point I'm trying to make).
>
>Just so I don't start a new war here, I'm not saying any of this is
>bad.  RISC seems to be proving its point.  But I think that a RISC
>compiler is NECESSARILY more complex than a CISC compiler, regardless
>of the level of optimization performed by the compiler.

This topic has been argued frequently in this newsgroup.  Whether or not
an i860 is hard to compile for proves zero about whether any given other
RISC is hard to compile for. It is hard to get data upon this topic,
but there is a little.  First, perhaps it would be good to hear from
people who have WRITTEN compilers for different architectures and see
I'll what THEY think [please]. Second, I'll cite one study, by an
unbiased source, especially since folks have been asking about it,
since I used a few of the foils at Hot Chips as an answer to a question
(not part of the talk, and if A.K. would send me his address, I'll send him
a copy):

	Funk, Bud K, "RISC and CISC benchmarks and insights",
	UNISYS World, January 1989, 11-14.

They evaluated 8 chips {80386, 32532, 68020, 68030, SPARC, 88000, 29000,
R3000}, running the same {small} integer benchmarks written in both {C, assembly
language}, using the same external memory, to keep things as fair as
possible.  [This is hard work, by the way, which is why you don't see more
of this kind of study.]

1) First, they handcoded the small benchmarks in assembler for all machines,
and called the 68020 == 1 (bigger is better).  The CISC performance ranged
from about .75 to 1.1; the 4 RISCs were about 2-2.5X faster.

2) They then compiled the C code.  The CISCs dropped about 50-60% in
performance; the RISCs dropped 20-40% in performance, so the resulting
ratio was that the RISCs ended up with a 4-5.5X performance advantage.

3) OF COURSE THESE ARE SMALL BENCHMARKS, AND SO ALL THE USUAL CAVEATS APPLY,
and I don't know (except in one case :-) exactly whose compilers were being
used, etc, etc.
However, the group doing these evaluations is NOT a purveyor of RISC chips
or compilers, and is trying to do a straight evaluation.

A quote from the article:
	"The RISC compilers are relatively new and still significantly
	better than their CISC counterparts."

Now, if that statement is true, I observe that it is NOT from lack of
competent people, working for years, to build good compilers for the
CISCs.......
-- 
-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>
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